1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * linux/arch/powerpc/kernel/traps.c
4 *
5 * Copyright 2007 Freescale Semiconductor.
6 * Copyright (C) 2003 Motorola
7 * Modified by Xianghua Xiao(x.xiao@motorola.com)
8 *
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * Modified by Cort Dougan (cort@cs.nmt.edu)
12 * and Paul Mackerras (paulus@cs.anu.edu.au)
13 *
14 * (C) Copyright 2000
15 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
16 */
17
18 /*
19 * This file handles the architecture-dependent parts of hardware exceptions
20 */
21
22 #include <common.h>
23 #include <asm/global_data.h>
24 #include <asm/ptrace.h>
25 #include <command.h>
26 #include <init.h>
27 #include <irq_func.h>
28 #include <kgdb.h>
29 #include <asm/processor.h>
30
31 DECLARE_GLOBAL_DATA_PTR;
32
33 /* Returns 0 if exception not found and fixup otherwise. */
34 extern unsigned long search_exception_table(unsigned long);
35
36 /*
37 * End of addressable memory. This may be less than the actual
38 * amount of memory on the system if we're unable to keep all
39 * the memory mapped in.
40 */
41 #define END_OF_MEM (gd->ram_base + get_effective_memsize())
42
set_tsr(unsigned long val)43 static __inline__ void set_tsr(unsigned long val)
44 {
45 asm volatile("mtspr 0x150, %0" : : "r" (val));
46 }
47
get_esr(void)48 static __inline__ unsigned long get_esr(void)
49 {
50 unsigned long val;
51 asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
52 return val;
53 }
54
55 #define ESR_MCI 0x80000000
56 #define ESR_PIL 0x08000000
57 #define ESR_PPR 0x04000000
58 #define ESR_PTR 0x02000000
59 #define ESR_DST 0x00800000
60 #define ESR_DIZ 0x00400000
61 #define ESR_U0F 0x00008000
62
63 #if defined(CONFIG_CMD_BEDBUG)
64 extern void do_bedbug_breakpoint(struct pt_regs *);
65 #endif
66
67 /*
68 * Trap & Exception support
69 */
70
print_backtrace(unsigned long * sp)71 static void print_backtrace(unsigned long *sp)
72 {
73 int cnt = 0;
74 unsigned long i;
75
76 printf("Call backtrace: ");
77 while (sp) {
78 if ((uint)sp > END_OF_MEM)
79 break;
80
81 i = sp[1];
82 if (cnt++ % 7 == 0)
83 printf("\n");
84 printf("%08lX ", i);
85 if (cnt > 32) break;
86 sp = (unsigned long *)*sp;
87 }
88 printf("\n");
89 }
90
show_regs(struct pt_regs * regs)91 void show_regs(struct pt_regs *regs)
92 {
93 int i;
94
95 printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
96 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
97 printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
98 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
99 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
100 regs->msr&MSR_IR ? 1 : 0,
101 regs->msr&MSR_DR ? 1 : 0);
102
103 printf("\n");
104 for (i = 0; i < 32; i++) {
105 if ((i % 8) == 0)
106 {
107 printf("GPR%02d: ", i);
108 }
109
110 printf("%08lX ", regs->gpr[i]);
111 if ((i % 8) == 7)
112 {
113 printf("\n");
114 }
115 }
116 }
117
118
_exception(int signr,struct pt_regs * regs)119 static void _exception(int signr, struct pt_regs *regs)
120 {
121 show_regs(regs);
122 print_backtrace((unsigned long *)regs->gpr[1]);
123 panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
124 }
125
CritcalInputException(struct pt_regs * regs)126 void CritcalInputException(struct pt_regs *regs)
127 {
128 panic("Critical Input Exception");
129 }
130
131 int machinecheck_count = 0;
132 int machinecheck_error = 0;
MachineCheckException(struct pt_regs * regs)133 void MachineCheckException(struct pt_regs *regs)
134 {
135 unsigned long fixup;
136 unsigned int mcsr, mcsrr0, mcsrr1, mcar;
137
138 /* Probing PCI using config cycles cause this exception
139 * when a device is not present. Catch it and return to
140 * the PCI exception handler.
141 */
142 if ((fixup = search_exception_table(regs->nip)) != 0) {
143 regs->nip = fixup;
144 return;
145 }
146
147 mcsrr0 = mfspr(SPRN_MCSRR0);
148 mcsrr1 = mfspr(SPRN_MCSRR1);
149 mcsr = mfspr(SPRN_MCSR);
150 mcar = mfspr(SPRN_MCAR);
151
152 machinecheck_count++;
153 machinecheck_error=1;
154
155 #if defined(CONFIG_CMD_KGDB)
156 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
157 return;
158 #endif
159
160 printf("Machine check in kernel mode.\n");
161 printf("Caused by (from mcsr): ");
162 printf("mcsr = 0x%08x\n", mcsr);
163 if (mcsr & 0x80000000)
164 printf("Machine check input pin\n");
165 if (mcsr & 0x40000000)
166 printf("Instruction cache parity error\n");
167 if (mcsr & 0x20000000)
168 printf("Data cache push parity error\n");
169 if (mcsr & 0x10000000)
170 printf("Data cache parity error\n");
171 if (mcsr & 0x00000080)
172 printf("Bus instruction address error\n");
173 if (mcsr & 0x00000040)
174 printf("Bus Read address error\n");
175 if (mcsr & 0x00000020)
176 printf("Bus Write address error\n");
177 if (mcsr & 0x00000010)
178 printf("Bus Instruction data bus error\n");
179 if (mcsr & 0x00000008)
180 printf("Bus Read data bus error\n");
181 if (mcsr & 0x00000004)
182 printf("Bus Write bus error\n");
183 if (mcsr & 0x00000002)
184 printf("Bus Instruction parity error\n");
185 if (mcsr & 0x00000001)
186 printf("Bus Read parity error\n");
187
188 show_regs(regs);
189 printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
190 mcsr, mcsrr0, mcsrr1, mcar);
191 print_backtrace((unsigned long *)regs->gpr[1]);
192 if (machinecheck_count > 10) {
193 panic("machine check count too high\n");
194 }
195
196 if (machinecheck_count > 1) {
197 regs->nip += 4; /* skip offending instruction */
198 printf("Skipping current instr, Returning to 0x%08lx\n",
199 regs->nip);
200 } else {
201 printf("Returning back to 0x%08lx\n",regs->nip);
202 }
203 }
204
AlignmentException(struct pt_regs * regs)205 void AlignmentException(struct pt_regs *regs)
206 {
207 #if defined(CONFIG_CMD_KGDB)
208 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
209 return;
210 #endif
211
212 show_regs(regs);
213 print_backtrace((unsigned long *)regs->gpr[1]);
214 panic("Alignment Exception");
215 }
216
ProgramCheckException(struct pt_regs * regs)217 void ProgramCheckException(struct pt_regs *regs)
218 {
219 long esr_val;
220
221 #if defined(CONFIG_CMD_KGDB)
222 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
223 return;
224 #endif
225
226 show_regs(regs);
227
228 esr_val = get_esr();
229 if( esr_val & ESR_PIL )
230 printf( "** Illegal Instruction **\n" );
231 else if( esr_val & ESR_PPR )
232 printf( "** Privileged Instruction **\n" );
233 else if( esr_val & ESR_PTR )
234 printf( "** Trap Instruction **\n" );
235
236 print_backtrace((unsigned long *)regs->gpr[1]);
237 panic("Program Check Exception");
238 }
239
PITException(struct pt_regs * regs)240 void PITException(struct pt_regs *regs)
241 {
242 /*
243 * Reset PIT interrupt
244 */
245 set_tsr(0x0c000000);
246
247 /*
248 * Call timer_interrupt routine in interrupts.c
249 */
250 timer_interrupt(NULL);
251 }
252
UnknownException(struct pt_regs * regs)253 void UnknownException(struct pt_regs *regs)
254 {
255 #if defined(CONFIG_CMD_KGDB)
256 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
257 return;
258 #endif
259
260 printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
261 regs->nip, regs->msr, regs->trap);
262 _exception(0, regs);
263 }
264
ExtIntException(struct pt_regs * regs)265 void ExtIntException(struct pt_regs *regs)
266 {
267 volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
268
269 uint vect;
270
271 #if defined(CONFIG_CMD_KGDB)
272 if (debugger_exception_handler && (*debugger_exception_handler)(regs))
273 return;
274 #endif
275
276 printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
277 regs->nip, regs->msr, regs->trap);
278 vect = pic->iack0;
279 printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect);
280 show_regs(regs);
281 print_backtrace((unsigned long *)regs->gpr[1]);
282 }
283
DebugException(struct pt_regs * regs)284 void DebugException(struct pt_regs *regs)
285 {
286 printf("Debugger trap at @ %lx\n", regs->nip );
287 show_regs(regs);
288 #if defined(CONFIG_CMD_BEDBUG)
289 do_bedbug_breakpoint( regs );
290 #endif
291 }
292