1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 */
5
6 #include <common.h>
7 #include <hang.h>
8 #include <init.h>
9 #include <asm/fsl_lbc.h>
10
11 #ifdef CONFIG_MPC83xx
12 #include "../mpc83xx/elbc/elbc.h"
13 #endif
14
15 #ifdef CONFIG_MPC85xx
16 /* Boards should provide their own version of this if they use lbc sdram */
__lbc_sdram_init(void)17 static void __lbc_sdram_init(void)
18 {
19 /* Do nothing */
20 }
21 void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init")));
22 #endif
23
24
print_lbc_regs(void)25 void print_lbc_regs(void)
26 {
27 int i;
28
29 printf("\nLocal Bus Controller Registers\n");
30 for (i = 0; i < 8; i++) {
31 printf("BR%d\t0x%08X\tOR%d\t0x%08X\n",
32 i, get_lbc_br(i), i, get_lbc_or(i));
33 }
34 printf("LBCR\t0x%08X\tLCRR\t0x%08X\n",
35 get_lbc_lbcr(), get_lbc_lcrr());
36 }
37
init_early_memctl_regs(void)38 void init_early_memctl_regs(void)
39 {
40 uint init_br1 = 1;
41
42 #ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
43 /* Set the local bus monitor timeout value to the maximum */
44 clrsetbits_be32(&(LBC_BASE_ADDR)->lbcr, LBCR_BMT|LBCR_BMTPS, 0xf);
45 #endif
46
47 #ifdef CONFIG_MPC85xx
48 /* if cs1 is already set via debugger, leave cs0/cs1 alone */
49 if (get_lbc_br(1) & BR_V)
50 init_br1 = 0;
51 #endif
52
53 /*
54 * Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at
55 * preliminary addresses - these have to be modified later
56 * when FLASH size has been determined
57 */
58 #if defined(CONFIG_SYS_OR0_REMAP)
59 set_lbc_or(0, CONFIG_SYS_OR0_REMAP);
60 #endif
61 #if defined(CONFIG_SYS_OR1_REMAP)
62 set_lbc_or(1, CONFIG_SYS_OR1_REMAP);
63 #endif
64 /* now restrict to preliminary range */
65 if (init_br1) {
66 #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM)
67 set_lbc_br(0, CONFIG_SYS_BR0_PRELIM);
68 set_lbc_or(0, CONFIG_SYS_OR0_PRELIM);
69 #endif
70
71 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM)
72 set_lbc_or(1, CONFIG_SYS_OR1_PRELIM);
73 set_lbc_br(1, CONFIG_SYS_BR1_PRELIM);
74 #endif
75 }
76
77 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
78 set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
79 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
80 #endif
81
82 #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
83 set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
84 set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
85 #endif
86
87 #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM)
88 set_lbc_or(4, CONFIG_SYS_OR4_PRELIM);
89 set_lbc_br(4, CONFIG_SYS_BR4_PRELIM);
90 #endif
91
92 #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM)
93 set_lbc_or(5, CONFIG_SYS_OR5_PRELIM);
94 set_lbc_br(5, CONFIG_SYS_BR5_PRELIM);
95 #endif
96
97 #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM)
98 set_lbc_or(6, CONFIG_SYS_OR6_PRELIM);
99 set_lbc_br(6, CONFIG_SYS_BR6_PRELIM);
100 #endif
101
102 #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM)
103 set_lbc_or(7, CONFIG_SYS_OR7_PRELIM);
104 set_lbc_br(7, CONFIG_SYS_BR7_PRELIM);
105 #endif
106 }
107
108 /*
109 * Configures a UPM. The function requires the respective MxMR to be set
110 * before calling this function. "size" is the number or entries, not a sizeof.
111 */
upmconfig(uint upm,uint * table,uint size)112 void upmconfig(uint upm, uint *table, uint size)
113 {
114 fsl_lbc_t *lbc = LBC_BASE_ADDR;
115 int i, mad, old_mad = 0;
116 u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK);
117 u32 msel = BR_UPMx_TO_MSEL(upm);
118 u32 *mxmr = &lbc->mamr + upm;
119 volatile u8 *dummy = NULL;
120
121 if (upm < UPMA || upm > UPMC) {
122 printf("Error: %s() Bad UPM index %d\n", __func__, upm);
123 hang();
124 }
125
126 /*
127 * Find the address for the dummy write - scan all of the BRs until we
128 * find one matching the UPM and extract the base address bits from it.
129 */
130 for (i = 0; i < 8; i++) {
131 if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) {
132 dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA);
133 break;
134 }
135 }
136
137 if (!dummy) {
138 printf("Error: %s() No matching BR\n", __func__);
139 hang();
140 }
141
142 /* Program UPM using steps outlined by the reference manual */
143 for (i = 0; i < size; i++) {
144 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i);
145 out_be32(&lbc->mdr, table[i]);
146 (void)in_be32(&lbc->mdr);
147 *dummy = 0;
148 do {
149 mad = in_be32(mxmr) & MxMR_MAD_MSK;
150 } while (mad <= old_mad && !(!mad && i == (size-1)));
151 old_mad = mad;
152 }
153
154 /* Return to normal operation */
155 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM);
156 }
157