1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * P1020RDB-PD Device Tree Source
4 *
5 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
6 * Copyright 2019 NXP
7 */
8
9/include/ "p1020.dtsi"
10
11/ {
12	model = "fsl,P1020RDB-PD";
13	compatible = "fsl,P1020RDB-PD";
14	#address-cells = <2>;
15	#size-cells = <2>;
16	interrupt-parent = <&mpic>;
17
18	soc: soc@ffe00000 {
19		ranges = <0x0 0x0 0xffe00000 0x100000>;
20
21		mdio@24000 {
22			phy0: ethernet-phy@0 {
23				interrupts = <3 1 0 0>;
24				reg = <0x0>;
25			};
26
27			phy1: ethernet-phy@1 {
28				interrupts = <2 1 0 0>;
29				reg = <0x1>;
30			};
31		};
32
33		mdio@25000 {
34			tbi1: tbi-phy@11 {
35				reg = <0x11>;
36				device_type = "tbi-phy";
37			};
38		};
39
40		mdio@26000 {
41			tbi2: tbi-phy@11 {
42				reg = <0x11>;
43				device_type = "tbi-phy";
44			};
45		};
46
47		enet0: ethernet@b0000 {
48			phy-connection-type = "rgmii-id";
49			fixed-link {
50				speed = <1000>;
51				full-duplex;
52			};
53		};
54
55		enet1: ethernet@b1000 {
56			phy-handle = <&phy0>;
57			tbi-handle = <&tbi1>;
58			phy-connection-type = "sgmii";
59		};
60
61		enet2: ethernet@b2000 {
62			phy-handle = <&phy1>;
63			phy-connection-type = "rgmii-id";
64		};
65	};
66
67	pci1: pcie@ffe09000 {
68		reg = <0x0 0xffe09000 0x0 0x1000>;	/* registers */
69		ranges = <0x01000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x00010000   /* downstream I/O */
70			  0x02000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000>; /* non-prefetchable memory */
71	};
72
73	pci0: pcie@ffe0a000 {
74		reg = <0x0 0xffe0a000 0x0 0x1000>;	/* registers */
75		ranges = <0x01000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x00010000   /* downstream I/O */
76			  0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000>; /* non-prefetchable memory */
77	};
78
79	aliases {
80		spi0 = &espi0;
81	};
82};
83
84/include/ "p1020-post.dtsi"
85
86&espi0 {
87	status = "okay";
88	flash@0 {
89		compatible = "jedec,spi-nor";
90		#address-cells = <1>;
91		#size-cells = <1>;
92		reg = <0>;
93		spi-max-frequency = <10000000>; /* input clock */
94	};
95};
96