1/dts-v1/;
2
3#include <dt-bindings/gpio/gpio.h>
4#include <dt-bindings/gpio/sandbox-gpio.h>
5#include <dt-bindings/input/input.h>
6#include <dt-bindings/pinctrl/sandbox-pinmux.h>
7#include <dt-bindings/mux/mux.h>
8
9/ {
10	model = "sandbox";
11	compatible = "sandbox";
12	#address-cells = <1>;
13	#size-cells = <1>;
14
15	aliases {
16		console = &uart0;
17		eth0 = "/eth@10002000";
18		eth3 = &eth_3;
19		eth5 = &eth_5;
20		gpio1 = &gpio_a;
21		gpio2 = &gpio_b;
22		gpio3 = &gpio_c;
23		i2c0 = "/i2c@0";
24		mmc0 = "/mmc0";
25		mmc1 = "/mmc1";
26		pci0 = &pci0;
27		pci1 = &pci1;
28		pci2 = &pci2;
29		remoteproc0 = &rproc_1;
30		remoteproc1 = &rproc_2;
31		rtc0 = &rtc_0;
32		rtc1 = &rtc_1;
33		spi0 = "/spi@0";
34		testfdt6 = "/e-test";
35		testbus3 = "/some-bus";
36		testfdt0 = "/some-bus/c-test@0";
37		testfdt12 = "/some-bus/c-test@1";
38		testfdt3 = "/b-test";
39		testfdt5 = "/some-bus/c-test@5";
40		testfdt8 = "/a-test";
41		testfdtm1 = &testfdtm1;
42		fdt-dummy0 = "/translation-test@8000/dev@0,0";
43		fdt-dummy1 = "/translation-test@8000/dev@1,100";
44		fdt-dummy2 = "/translation-test@8000/dev@2,200";
45		fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
46		fdt-dummy4 = "/translation-test@8000/xlatebus@4,400/devs/dev@19";
47		usb0 = &usb_0;
48		usb1 = &usb_1;
49		usb2 = &usb_2;
50		axi0 = &axi;
51		osd0 = "/osd";
52	};
53
54	audio: audio-codec {
55		compatible = "sandbox,audio-codec";
56		#sound-dai-cells = <1>;
57	};
58
59	buttons {
60		compatible = "gpio-keys";
61
62		btn1 {
63			gpios = <&gpio_a 3 0>;
64			label = "button1";
65		};
66
67		btn2 {
68			gpios = <&gpio_a 4 0>;
69			label = "button2";
70		};
71	};
72
73	buttons2 {
74		compatible = "adc-keys";
75		io-channels = <&adc 3>;
76		keyup-threshold-microvolt = <3000000>;
77
78		button-up {
79			label = "button3";
80			linux,code = <KEY_F3>;
81			press-threshold-microvolt = <1500000>;
82		};
83
84		button-down {
85			label = "button4";
86			linux,code = <KEY_F4>;
87			press-threshold-microvolt = <1000000>;
88		};
89
90		button-enter {
91			label = "button5";
92			linux,code = <KEY_F5>;
93			press-threshold-microvolt = <500000>;
94		};
95	};
96
97	cros_ec: cros-ec {
98		reg = <0 0>;
99		compatible = "google,cros-ec-sandbox";
100
101		/*
102		 * This describes the flash memory within the EC. Note
103		 * that the STM32L flash erases to 0, not 0xff.
104		 */
105		flash {
106			image-pos = <0x08000000>;
107			size = <0x20000>;
108			erase-value = <0>;
109
110			/* Information for sandbox */
111			ro {
112				image-pos = <0>;
113				size = <0xf000>;
114			};
115			wp-ro {
116				image-pos = <0xf000>;
117				size = <0x1000>;
118				used = <0x884>;
119				compress = "lz4";
120				uncomp-size = <0xcf8>;
121				hash {
122					algo = "sha256";
123					value = [00 01 02 03 04 05 06 07
124						08 09 0a 0b 0c 0d 0e 0f
125						10 11 12 13 14 15 16 17
126						18 19 1a 1b 1c 1d 1e 1f];
127				};
128			};
129			rw {
130				image-pos = <0x10000>;
131				size = <0x10000>;
132			};
133		};
134	};
135
136	dsi_host: dsi_host {
137		compatible = "sandbox,dsi-host";
138	};
139
140	a-test {
141		reg = <0 1>;
142		compatible = "denx,u-boot-fdt-test";
143		ping-expect = <0>;
144		ping-add = <0>;
145		u-boot,dm-pre-reloc;
146		test-gpios = <&gpio_a 1>, <&gpio_a 4>,
147			<&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
148			<0>, <&gpio_a 12>;
149		test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
150			<&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
151			<&gpio_b 7 GPIO_IN 3 2 1>,
152			<&gpio_b 8 GPIO_OUT 3 2 1>,
153			<&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
154		test3-gpios =
155			<&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
156			<&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
157			<&gpio_c 2 GPIO_OUT>,
158			<&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
159			<&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
160			<&gpio_c 5 GPIO_IN>,
161			<&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
162			<&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
163		test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
164		test5-gpios = <&gpio_a 19>;
165
166		int-value = <1234>;
167		uint-value = <(-1234)>;
168		int64-value = /bits/ 64 <0x1111222233334444>;
169		int-array = <5678 9123 4567>;
170		str-value = "test string";
171		interrupts-extended = <&irq 3 0>;
172		acpi,name = "GHIJ";
173		phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>;
174
175		mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
176			       <&muxcontroller0 2>, <&muxcontroller0 3>,
177			       <&muxcontroller1>;
178		mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4";
179		mux-syscon = <&syscon3>;
180		display-timings {
181			timing0: 240x320 {
182				clock-frequency = <6500000>;
183				hactive = <240>;
184				vactive = <320>;
185				hfront-porch = <6>;
186				hback-porch = <7>;
187				hsync-len = <1>;
188				vback-porch = <5>;
189				vfront-porch = <8>;
190				vsync-len = <2>;
191				hsync-active = <1>;
192				vsync-active = <0>;
193				de-active = <1>;
194				pixelclk-active = <1>;
195				interlaced;
196				doublescan;
197				doubleclk;
198			};
199			timing1: 480x800 {
200				clock-frequency = <9000000>;
201				hactive = <480>;
202				vactive = <800>;
203				hfront-porch = <10>;
204				hback-porch = <59>;
205				hsync-len = <12>;
206				vback-porch = <15>;
207				vfront-porch = <17>;
208				vsync-len = <16>;
209				hsync-active = <0>;
210				vsync-active = <1>;
211				de-active = <0>;
212				pixelclk-active = <0>;
213			};
214			timing2: 800x480 {
215				clock-frequency = <33500000>;
216				hactive = <800>;
217				vactive = <480>;
218				hback-porch = <89>;
219				hfront-porch = <164>;
220				vback-porch = <23>;
221				vfront-porch = <10>;
222				hsync-len = <11>;
223				vsync-len = <13>;
224			};
225		};
226	};
227
228	junk {
229		reg = <1 1>;
230		compatible = "not,compatible";
231	};
232
233	no-compatible {
234		reg = <2 1>;
235	};
236
237	backlight: backlight {
238		compatible = "pwm-backlight";
239		enable-gpios = <&gpio_a 1>;
240		power-supply = <&ldo_1>;
241		pwms = <&pwm 0 1000>;
242		default-brightness-level = <5>;
243		brightness-levels = <0 16 32 64 128 170 202 234 255>;
244	};
245
246	bind-test {
247		compatible = "simple-bus";
248		bind-test-child1 {
249			compatible = "sandbox,phy";
250			#phy-cells = <1>;
251		};
252
253		bind-test-child2 {
254			compatible = "simple-bus";
255		};
256	};
257
258	b-test {
259		reg = <3 1>;
260		compatible = "denx,u-boot-fdt-test";
261		ping-expect = <3>;
262		ping-add = <3>;
263
264		mux-controls = <&muxcontroller0 0>;
265		mux-control-names = "mux0";
266	};
267
268	phy_provider0: gen_phy@0 {
269		compatible = "sandbox,phy";
270		#phy-cells = <1>;
271	};
272
273	phy_provider1: gen_phy@1 {
274		compatible = "sandbox,phy";
275		#phy-cells = <0>;
276		broken;
277	};
278
279	phy_provider2: gen_phy@2 {
280		compatible = "sandbox,phy";
281		#phy-cells = <0>;
282	};
283
284	gen_phy_user: gen_phy_user {
285		compatible = "simple-bus";
286		phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
287		phy-names = "phy1", "phy2", "phy3";
288	};
289
290	gen_phy_user1: gen_phy_user1 {
291		compatible = "simple-bus";
292		phys = <&phy_provider0 0>, <&phy_provider2>;
293		phy-names = "phy1", "phy2";
294	};
295
296	some-bus {
297		#address-cells = <1>;
298		#size-cells = <0>;
299		compatible = "denx,u-boot-test-bus";
300		reg = <3 1>;
301		ping-expect = <4>;
302		ping-add = <4>;
303		c-test@5 {
304			compatible = "denx,u-boot-fdt-test";
305			reg = <5>;
306			ping-expect = <5>;
307			ping-add = <5>;
308		};
309		c-test@0 {
310			compatible = "denx,u-boot-fdt-test";
311			reg = <0>;
312			ping-expect = <6>;
313			ping-add = <6>;
314		};
315		c-test@1 {
316			compatible = "denx,u-boot-fdt-test";
317			reg = <1>;
318			ping-expect = <7>;
319			ping-add = <7>;
320		};
321	};
322
323	d-test {
324		reg = <3 1>;
325		ping-expect = <6>;
326		ping-add = <6>;
327		compatible = "google,another-fdt-test";
328	};
329
330	e-test {
331		reg = <3 1>;
332		ping-expect = <6>;
333		ping-add = <6>;
334		compatible = "google,another-fdt-test";
335	};
336
337	f-test {
338		compatible = "denx,u-boot-fdt-test";
339	};
340
341	g-test {
342		compatible = "denx,u-boot-fdt-test";
343	};
344
345	h-test {
346		compatible = "denx,u-boot-fdt-test1";
347	};
348
349	i-test {
350		compatible = "mediatek,u-boot-fdt-test";
351		#address-cells = <1>;
352		#size-cells = <0>;
353
354		subnode@0 {
355			reg = <0>;
356		};
357
358		subnode@1 {
359			reg = <1>;
360		};
361
362		subnode@2 {
363			reg = <2>;
364		};
365	};
366
367	devres-test {
368		compatible = "denx,u-boot-devres-test";
369	};
370
371	another-test {
372		reg = <0 2>;
373		compatible = "denx,u-boot-fdt-test";
374		test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
375		test5-gpios = <&gpio_a 19>;
376	};
377
378	mmio-bus@0 {
379		#address-cells = <1>;
380		#size-cells = <1>;
381		compatible = "denx,u-boot-test-bus";
382		dma-ranges = <0x10000000 0x00000000 0x00040000>;
383
384		subnode@0 {
385			compatible = "denx,u-boot-fdt-test";
386		};
387	};
388
389	mmio-bus@1 {
390		#address-cells = <1>;
391		#size-cells = <1>;
392		compatible = "denx,u-boot-test-bus";
393
394		subnode@0 {
395			compatible = "denx,u-boot-fdt-test";
396		};
397	};
398
399	acpi_test1: acpi-test {
400		compatible = "denx,u-boot-acpi-test";
401		acpi-ssdt-test-data = "ab";
402		acpi-dsdt-test-data = "hi";
403		child {
404			compatible = "denx,u-boot-acpi-test";
405		};
406	};
407
408	acpi_test2: acpi-test2 {
409		compatible = "denx,u-boot-acpi-test";
410		acpi-ssdt-test-data = "cd";
411		acpi-dsdt-test-data = "jk";
412	};
413
414	clocks {
415		clk_fixed: clk-fixed {
416			compatible = "fixed-clock";
417			#clock-cells = <0>;
418			clock-frequency = <1234>;
419		};
420
421		clk_fixed_factor: clk-fixed-factor {
422			compatible = "fixed-factor-clock";
423			#clock-cells = <0>;
424			clock-div = <3>;
425			clock-mult = <2>;
426			clocks = <&clk_fixed>;
427		};
428
429		osc {
430			compatible = "fixed-clock";
431			#clock-cells = <0>;
432			clock-frequency = <20000000>;
433		};
434	};
435
436	clk_sandbox: clk-sbox {
437		compatible = "sandbox,clk";
438		#clock-cells = <1>;
439		assigned-clocks = <&clk_sandbox 3>;
440		assigned-clock-rates = <321>;
441	};
442
443	clk-test {
444		compatible = "sandbox,clk-test";
445		clocks = <&clk_fixed>,
446			 <&clk_sandbox 1>,
447			 <&clk_sandbox 0>,
448			 <&clk_sandbox 3>,
449			 <&clk_sandbox 2>;
450		clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
451	};
452
453	ccf: clk-ccf {
454		compatible = "sandbox,clk-ccf";
455	};
456
457	eth@10002000 {
458		compatible = "sandbox,eth";
459		reg = <0x10002000 0x1000>;
460		fake-host-hwaddr = [00 00 66 44 22 00];
461	};
462
463	eth_5: eth@10003000 {
464		compatible = "sandbox,eth";
465		reg = <0x10003000 0x1000>;
466		fake-host-hwaddr = [00 00 66 44 22 11];
467	};
468
469	eth_3: sbe5 {
470		compatible = "sandbox,eth";
471		reg = <0x10005000 0x1000>;
472		fake-host-hwaddr = [00 00 66 44 22 33];
473	};
474
475	eth@10004000 {
476		compatible = "sandbox,eth";
477		reg = <0x10004000 0x1000>;
478		fake-host-hwaddr = [00 00 66 44 22 22];
479	};
480
481	firmware {
482		sandbox_firmware: sandbox-firmware {
483			compatible = "sandbox,firmware";
484		};
485
486		sandbox-scmi-agent@0 {
487			compatible = "sandbox,scmi-agent";
488			#address-cells = <1>;
489			#size-cells = <0>;
490
491			clk_scmi0: protocol@14 {
492				reg = <0x14>;
493				#clock-cells = <1>;
494			};
495
496			reset_scmi0: protocol@16 {
497				reg = <0x16>;
498				#reset-cells = <1>;
499			};
500		};
501
502		sandbox-scmi-agent@1 {
503			compatible = "sandbox,scmi-agent";
504			#address-cells = <1>;
505			#size-cells = <0>;
506
507			clk_scmi1: protocol@14 {
508				reg = <0x14>;
509				#clock-cells = <1>;
510			};
511
512			protocol@10 {
513				reg = <0x10>;
514			};
515		};
516	};
517
518	pinctrl-gpio {
519		compatible = "sandbox,pinctrl-gpio";
520
521		gpio_a: base-gpios {
522			compatible = "sandbox,gpio";
523			gpio-controller;
524			#gpio-cells = <1>;
525			gpio-bank-name = "a";
526			sandbox,gpio-count = <20>;
527			hog_input_active_low {
528				gpio-hog;
529				input;
530				gpios = <10 GPIO_ACTIVE_LOW>;
531			};
532			hog_input_active_high {
533				gpio-hog;
534				input;
535				gpios = <11 GPIO_ACTIVE_HIGH>;
536			};
537			hog_output_low {
538				gpio-hog;
539				output-low;
540				gpios = <12 GPIO_ACTIVE_HIGH>;
541			};
542			hog_output_high {
543				gpio-hog;
544				output-high;
545				gpios = <13 GPIO_ACTIVE_HIGH>;
546			};
547		};
548
549		gpio_b: extra-gpios {
550			compatible = "sandbox,gpio";
551			gpio-controller;
552			#gpio-cells = <5>;
553			gpio-bank-name = "b";
554			sandbox,gpio-count = <10>;
555		};
556
557		gpio_c: pinmux-gpios {
558			compatible = "sandbox,gpio";
559			gpio-controller;
560			#gpio-cells = <2>;
561			gpio-bank-name = "c";
562			sandbox,gpio-count = <10>;
563		};
564	};
565
566	i2c@0 {
567		#address-cells = <1>;
568		#size-cells = <0>;
569		reg = <0 1>;
570		compatible = "sandbox,i2c";
571		clock-frequency = <100000>;
572		eeprom@2c {
573			reg = <0x2c>;
574			compatible = "i2c-eeprom";
575			sandbox,emul = <&emul_eeprom>;
576			partitions {
577				compatible = "fixed-partitions";
578				#address-cells = <1>;
579				#size-cells = <1>;
580				bootcount_i2c: bootcount@10 {
581					reg = <10 2>;
582				};
583			};
584		};
585
586		rtc_0: rtc@43 {
587			reg = <0x43>;
588			compatible = "sandbox-rtc";
589			sandbox,emul = <&emul0>;
590		};
591
592		rtc_1: rtc@61 {
593			reg = <0x61>;
594			compatible = "sandbox-rtc";
595			sandbox,emul = <&emul1>;
596		};
597
598		i2c_emul: emul {
599			reg = <0xff>;
600			compatible = "sandbox,i2c-emul-parent";
601			emul_eeprom: emul-eeprom {
602				compatible = "sandbox,i2c-eeprom";
603				sandbox,filename = "i2c.bin";
604				sandbox,size = <256>;
605			};
606			emul0: emul0 {
607				compatible = "sandbox,i2c-rtc";
608			};
609			emul1: emull {
610				compatible = "sandbox,i2c-rtc";
611			};
612		};
613
614		sandbox_pmic: sandbox_pmic {
615			reg = <0x40>;
616			sandbox,emul = <&emul_pmic0>;
617		};
618
619		mc34708: pmic@41 {
620			reg = <0x41>;
621			sandbox,emul = <&emul_pmic1>;
622		};
623	};
624
625	bootcount@0 {
626		compatible = "u-boot,bootcount-rtc";
627		rtc = <&rtc_1>;
628		offset = <0x13>;
629	};
630
631	bootcount {
632		compatible = "u-boot,bootcount-i2c-eeprom";
633		i2c-eeprom = <&bootcount_i2c>;
634	};
635
636	adc: adc@0 {
637		compatible = "sandbox,adc";
638		#io-channel-cells = <1>;
639		vdd-supply = <&buck2>;
640		vss-microvolts = <0>;
641	};
642
643	irq: irq {
644		compatible = "sandbox,irq";
645		interrupt-controller;
646		#interrupt-cells = <2>;
647	};
648
649	lcd {
650		u-boot,dm-pre-reloc;
651		compatible = "sandbox,lcd-sdl";
652		xres = <1366>;
653		yres = <768>;
654	};
655
656	leds {
657		compatible = "gpio-leds";
658
659		iracibble {
660			gpios = <&gpio_a 1 0>;
661			label = "sandbox:red";
662		};
663
664		martinet {
665			gpios = <&gpio_a 2 0>;
666			label = "sandbox:green";
667		};
668
669		default_on {
670			gpios = <&gpio_a 5 0>;
671			label = "sandbox:default_on";
672			default-state = "on";
673		};
674
675		default_off {
676			gpios = <&gpio_a 6 0>;
677			/* label intentionally omitted */
678			default-state = "off";
679		};
680	};
681
682	mbox: mbox {
683		compatible = "sandbox,mbox";
684		#mbox-cells = <1>;
685	};
686
687	mbox-test {
688		compatible = "sandbox,mbox-test";
689		mboxes = <&mbox 100>, <&mbox 1>;
690		mbox-names = "other", "test";
691	};
692
693	cpus {
694		timebase-frequency = <2000000>;
695		cpu-test1 {
696			timebase-frequency = <3000000>;
697			compatible = "sandbox,cpu_sandbox";
698			u-boot,dm-pre-reloc;
699		};
700
701		cpu-test2 {
702			compatible = "sandbox,cpu_sandbox";
703			u-boot,dm-pre-reloc;
704		};
705
706		cpu-test3 {
707			compatible = "sandbox,cpu_sandbox";
708			u-boot,dm-pre-reloc;
709		};
710	};
711
712	chipid: chipid {
713		compatible = "sandbox,soc";
714	};
715
716	i2s: i2s {
717		compatible = "sandbox,i2s";
718		#sound-dai-cells = <1>;
719		sandbox,silent;	/* Don't emit sounds while testing */
720	};
721
722	nop-test_0 {
723		compatible = "sandbox,nop_sandbox1";
724		nop-test_1 {
725			compatible = "sandbox,nop_sandbox2";
726			bind = "True";
727		};
728		nop-test_2 {
729			compatible = "sandbox,nop_sandbox2";
730			bind = "False";
731		};
732	};
733
734	misc-test {
735		compatible = "sandbox,misc_sandbox";
736	};
737
738	mmc2 {
739		compatible = "sandbox,mmc";
740	};
741
742	mmc1 {
743		compatible = "sandbox,mmc";
744	};
745
746	mmc0 {
747		compatible = "sandbox,mmc";
748	};
749
750	pch {
751		compatible = "sandbox,pch";
752	};
753
754	pci0: pci@0 {
755		compatible = "sandbox,pci";
756		device_type = "pci";
757		bus-range = <0x00 0xff>;
758		#address-cells = <3>;
759		#size-cells = <2>;
760		ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
761				0x01000000 0 0x20000000 0x20000000 0 0x2000>;
762		pci@0,0 {
763			compatible = "pci-generic";
764			reg = <0x0000 0 0 0 0>;
765			sandbox,emul = <&swap_case_emul0_0>;
766		};
767		pci@1,0 {
768			compatible = "pci-generic";
769			/* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
770			reg = <0x02000814 0 0 0 0
771			       0x01000810 0 0 0 0>;
772			sandbox,emul = <&swap_case_emul0_1>;
773		};
774		p2sb-pci@2,0 {
775			compatible = "sandbox,p2sb";
776			reg = <0x02001010 0 0 0 0>;
777			sandbox,emul = <&p2sb_emul>;
778
779			adder {
780				intel,p2sb-port-id = <3>;
781				compatible = "sandbox,adder";
782			};
783		};
784		pci@1e,0 {
785			compatible = "sandbox,pmc";
786			reg = <0xf000 0 0 0 0>;
787			sandbox,emul = <&pmc_emul1e>;
788			acpi-base = <0x400>;
789			gpe0-dwx-mask = <0xf>;
790			gpe0-dwx-shift-base = <4>;
791			gpe0-dw = <6 7 9>;
792			gpe0-sts = <0x20>;
793			gpe0-en = <0x30>;
794		};
795		pci@1f,0 {
796			compatible = "pci-generic";
797			/* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
798			reg = <0x0100f810 0 0 0 0>;
799			sandbox,emul = <&swap_case_emul0_1f>;
800		};
801	};
802
803	pci-emul0 {
804		compatible = "sandbox,pci-emul-parent";
805		swap_case_emul0_0: emul0@0,0 {
806			compatible = "sandbox,swap-case";
807		};
808		swap_case_emul0_1: emul0@1,0 {
809			compatible = "sandbox,swap-case";
810			use-ea;
811		};
812		swap_case_emul0_1f: emul0@1f,0 {
813			compatible = "sandbox,swap-case";
814		};
815		p2sb_emul: emul@2,0 {
816			compatible = "sandbox,p2sb-emul";
817		};
818		pmc_emul1e: emul@1e,0 {
819			compatible = "sandbox,pmc-emul";
820		};
821	};
822
823	pci1: pci@1 {
824		compatible = "sandbox,pci";
825		device_type = "pci";
826		bus-range = <0x00 0xff>;
827		#address-cells = <3>;
828		#size-cells = <2>;
829		ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0
830			  0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1
831			  0x01000000 0 0x40000000 0x40000000 0 0x2000>;
832		sandbox,dev-info = <0x08 0x00 0x1234 0x5678
833				    0x0c 0x00 0x1234 0x5678
834				    0x10 0x00 0x1234 0x5678>;
835		pci@10,0 {
836			reg = <0x8000 0 0 0 0>;
837		};
838	};
839
840	pci2: pci@2 {
841		compatible = "sandbox,pci";
842		device_type = "pci";
843		bus-range = <0x00 0xff>;
844		#address-cells = <3>;
845		#size-cells = <2>;
846		ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
847				0x01000000 0 0x60000000 0x60000000 0 0x2000>;
848		sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
849		pci@1f,0 {
850			compatible = "pci-generic";
851			reg = <0xf800 0 0 0 0>;
852			sandbox,emul = <&swap_case_emul2_1f>;
853		};
854	};
855
856	pci-emul2 {
857		compatible = "sandbox,pci-emul-parent";
858		swap_case_emul2_1f: emul2@1f,0 {
859			compatible = "sandbox,swap-case";
860		};
861	};
862
863	pci_ep: pci_ep {
864		compatible = "sandbox,pci_ep";
865	};
866
867	probing {
868		compatible = "simple-bus";
869		test1 {
870			compatible = "denx,u-boot-probe-test";
871		};
872
873		test2 {
874			compatible = "denx,u-boot-probe-test";
875		};
876
877		test3 {
878			compatible = "denx,u-boot-probe-test";
879		};
880
881		test4 {
882			compatible = "denx,u-boot-probe-test";
883			first-syscon = <&syscon0>;
884			second-sys-ctrl = <&another_system_controller>;
885			third-syscon = <&syscon2>;
886		};
887	};
888
889	pwrdom: power-domain {
890		compatible = "sandbox,power-domain";
891		#power-domain-cells = <1>;
892	};
893
894	power-domain-test {
895		compatible = "sandbox,power-domain-test";
896		power-domains = <&pwrdom 2>;
897	};
898
899	pwm: pwm {
900		compatible = "sandbox,pwm";
901		#pwm-cells = <2>;
902	};
903
904	pwm2 {
905		compatible = "sandbox,pwm";
906		#pwm-cells = <2>;
907	};
908
909	ram {
910		compatible = "sandbox,ram";
911	};
912
913	reset@0 {
914		compatible = "sandbox,warm-reset";
915	};
916
917	reset@1 {
918		compatible = "sandbox,reset";
919	};
920
921	resetc: reset-ctl {
922		compatible = "sandbox,reset-ctl";
923		#reset-cells = <1>;
924	};
925
926	reset-ctl-test {
927		compatible = "sandbox,reset-ctl-test";
928		resets = <&resetc 100>, <&resetc 2>;
929		reset-names = "other", "test";
930	};
931
932	rng {
933		compatible = "sandbox,sandbox-rng";
934	};
935
936	rproc_1: rproc@1 {
937		compatible = "sandbox,test-processor";
938		remoteproc-name = "remoteproc-test-dev1";
939	};
940
941	rproc_2: rproc@2 {
942		compatible = "sandbox,test-processor";
943		internal-memory-mapped;
944		remoteproc-name = "remoteproc-test-dev2";
945	};
946
947	panel {
948		compatible = "simple-panel";
949		backlight = <&backlight 0 100>;
950	};
951
952	smem@0 {
953		compatible = "sandbox,smem";
954	};
955
956	sound {
957		compatible = "sandbox,sound";
958		cpu {
959			sound-dai = <&i2s 0>;
960		};
961
962		codec {
963			sound-dai = <&audio 0>;
964		};
965	};
966
967	spi@0 {
968		#address-cells = <1>;
969		#size-cells = <0>;
970		reg = <0 1>;
971		compatible = "sandbox,spi";
972		cs-gpios = <0>, <0>, <&gpio_a 0>;
973		spi.bin@0 {
974			reg = <0>;
975			compatible = "spansion,m25p16", "jedec,spi-nor";
976			spi-max-frequency = <40000000>;
977			sandbox,filename = "spi.bin";
978		};
979		spi.bin@1 {
980			reg = <1>;
981			compatible = "spansion,m25p16", "jedec,spi-nor";
982			spi-max-frequency = <50000000>;
983			sandbox,filename = "spi.bin";
984			spi-cpol;
985			spi-cpha;
986		};
987	};
988
989	syscon0: syscon@0 {
990		compatible = "sandbox,syscon0";
991		reg = <0x10 16>;
992	};
993
994	another_system_controller: syscon@1 {
995		compatible = "sandbox,syscon1";
996		reg = <0x20 5
997			0x28 6
998			0x30 7
999			0x38 8>;
1000	};
1001
1002	syscon2: syscon@2 {
1003		compatible = "simple-mfd", "syscon";
1004		reg = <0x40 5
1005			0x48 6
1006			0x50 7
1007			0x58 8>;
1008	};
1009
1010	syscon3: syscon@3 {
1011		compatible = "simple-mfd", "syscon";
1012		reg = <0x000100 0x10>;
1013
1014		muxcontroller0: a-mux-controller {
1015			compatible = "mmio-mux";
1016			#mux-control-cells = <1>;
1017
1018			mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
1019					<0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
1020					<0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
1021			idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
1022			u-boot,mux-autoprobe;
1023		};
1024	};
1025
1026	muxcontroller1: emul-mux-controller {
1027		compatible = "mux-emul";
1028		#mux-control-cells = <0>;
1029		u-boot,mux-autoprobe;
1030		idle-state = <0xabcd>;
1031	};
1032
1033	testfdtm0 {
1034		compatible = "denx,u-boot-fdtm-test";
1035	};
1036
1037	testfdtm1: testfdtm1 {
1038		compatible = "denx,u-boot-fdtm-test";
1039	};
1040
1041	testfdtm2 {
1042		compatible = "denx,u-boot-fdtm-test";
1043	};
1044
1045	timer@0 {
1046		compatible = "sandbox,timer";
1047		clock-frequency = <1000000>;
1048	};
1049
1050	timer@1 {
1051		compatible = "sandbox,timer";
1052		sandbox,timebase-frequency-fallback;
1053	};
1054
1055	tpm2 {
1056		compatible = "sandbox,tpm2";
1057	};
1058
1059	uart0: serial {
1060		compatible = "sandbox,serial";
1061		u-boot,dm-pre-reloc;
1062	};
1063
1064	usb_0: usb@0 {
1065		compatible = "sandbox,usb";
1066		status = "disabled";
1067		hub {
1068			compatible = "sandbox,usb-hub";
1069			#address-cells = <1>;
1070			#size-cells = <0>;
1071			flash-stick {
1072				reg = <0>;
1073				compatible = "sandbox,usb-flash";
1074			};
1075		};
1076	};
1077
1078	usb_1: usb@1 {
1079		compatible = "sandbox,usb";
1080		hub {
1081			compatible = "usb-hub";
1082			usb,device-class = <9>;
1083			#address-cells = <1>;
1084			#size-cells = <0>;
1085			hub-emul {
1086				compatible = "sandbox,usb-hub";
1087				#address-cells = <1>;
1088				#size-cells = <0>;
1089				flash-stick@0 {
1090					reg = <0>;
1091					compatible = "sandbox,usb-flash";
1092					sandbox,filepath = "testflash.bin";
1093				};
1094
1095				flash-stick@1 {
1096					reg = <1>;
1097					compatible = "sandbox,usb-flash";
1098					sandbox,filepath = "testflash1.bin";
1099				};
1100
1101				flash-stick@2 {
1102					reg = <2>;
1103					compatible = "sandbox,usb-flash";
1104					sandbox,filepath = "testflash2.bin";
1105				};
1106
1107				keyb@3 {
1108					reg = <3>;
1109					compatible = "sandbox,usb-keyb";
1110				};
1111
1112			};
1113
1114			usbstor@1 {
1115				reg = <1>;
1116			};
1117			usbstor@3 {
1118				reg = <3>;
1119			};
1120		};
1121	};
1122
1123	usb_2: usb@2 {
1124		compatible = "sandbox,usb";
1125		status = "disabled";
1126	};
1127
1128	spmi: spmi@0 {
1129		compatible = "sandbox,spmi";
1130		#address-cells = <0x1>;
1131		#size-cells = <0x1>;
1132		ranges;
1133		pm8916@0 {
1134			compatible = "qcom,spmi-pmic";
1135			reg = <0x0 0x1>;
1136			#address-cells = <0x1>;
1137			#size-cells = <0x1>;
1138			ranges;
1139
1140			spmi_gpios: gpios@c000 {
1141				compatible = "qcom,pm8916-gpio";
1142				reg = <0xc000 0x400>;
1143				gpio-controller;
1144				gpio-count = <4>;
1145				#gpio-cells = <2>;
1146				gpio-bank-name="spmi";
1147			};
1148		};
1149	};
1150
1151	wdt0: wdt@0 {
1152		compatible = "sandbox,wdt";
1153	};
1154
1155	axi: axi@0 {
1156		compatible = "sandbox,axi";
1157		#address-cells = <0x1>;
1158		#size-cells = <0x1>;
1159		store@0 {
1160			compatible = "sandbox,sandbox_store";
1161			reg = <0x0 0x400>;
1162		};
1163	};
1164
1165	chosen {
1166		#address-cells = <1>;
1167		#size-cells = <1>;
1168		setting = "sunrise ohoka";
1169		other-node = "/some-bus/c-test@5";
1170		int-values = <0x1937 72993>;
1171		u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
1172		chosen-test {
1173			compatible = "denx,u-boot-fdt-test";
1174			reg = <9 1>;
1175		};
1176	};
1177
1178	translation-test@8000 {
1179		compatible = "simple-bus";
1180		reg = <0x8000 0x4000>;
1181
1182		#address-cells = <0x2>;
1183		#size-cells = <0x1>;
1184
1185		ranges = <0 0x0 0x8000 0x1000
1186			  1 0x100 0x9000 0x1000
1187			  2 0x200 0xA000 0x1000
1188			  3 0x300 0xB000 0x1000
1189			  4 0x400 0xC000 0x1000
1190			 >;
1191
1192		dma-ranges = <0 0x000 0x10000000 0x1000
1193			      1 0x100 0x20000000 0x1000
1194			     >;
1195
1196		dev@0,0 {
1197			compatible = "denx,u-boot-fdt-dummy";
1198			reg = <0 0x0 0x1000>;
1199			reg-names = "sandbox-dummy-0";
1200		};
1201
1202		dev@1,100 {
1203			compatible = "denx,u-boot-fdt-dummy";
1204			reg = <1 0x100 0x1000>;
1205
1206		};
1207
1208		dev@2,200 {
1209			compatible = "denx,u-boot-fdt-dummy";
1210			reg = <2 0x200 0x1000>;
1211		};
1212
1213
1214		noxlatebus@3,300 {
1215			compatible = "simple-bus";
1216			reg = <3 0x300 0x1000>;
1217
1218			#address-cells = <0x1>;
1219			#size-cells = <0x0>;
1220
1221			dev@42 {
1222				compatible = "denx,u-boot-fdt-dummy";
1223				reg = <0x42>;
1224			};
1225		};
1226
1227		xlatebus@4,400 {
1228			compatible = "sandbox,zero-size-cells-bus";
1229			reg = <4 0x400 0x1000>;
1230			#address-cells = <1>;
1231			#size-cells = <1>;
1232			ranges = <0 4 0x400 0x1000>;
1233
1234			devs {
1235				#address-cells = <1>;
1236				#size-cells = <0>;
1237
1238				dev@19 {
1239					compatible = "denx,u-boot-fdt-dummy";
1240					reg = <0x19>;
1241				};
1242			};
1243		};
1244
1245	};
1246
1247	osd {
1248		compatible = "sandbox,sandbox_osd";
1249	};
1250
1251	sandbox_tee {
1252		compatible = "sandbox,tee";
1253	};
1254
1255	sandbox_virtio1 {
1256		compatible = "sandbox,virtio1";
1257	};
1258
1259	sandbox_virtio2 {
1260		compatible = "sandbox,virtio2";
1261	};
1262
1263	sandbox_scmi {
1264		compatible = "sandbox,scmi-devices";
1265		clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>;
1266		resets = <&reset_scmi0 3>;
1267	};
1268
1269	pinctrl {
1270		compatible = "sandbox,pinctrl";
1271
1272		pinctrl-names = "default", "alternate";
1273		pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>;
1274		pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>;
1275
1276		pinctrl_gpios: gpios {
1277			gpio0 {
1278				pins = "P5";
1279				function = "GPIO";
1280				bias-pull-up;
1281				input-disable;
1282			};
1283			gpio1 {
1284				pins = "P6";
1285				function = "GPIO";
1286				output-high;
1287				drive-open-drain;
1288			};
1289			gpio2 {
1290				pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>;
1291				bias-pull-down;
1292				input-enable;
1293			};
1294			gpio3 {
1295				pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>;
1296				bias-disable;
1297			};
1298		};
1299
1300		pinctrl_i2c: i2c {
1301			groups {
1302				groups = "I2C_UART";
1303				function = "I2C";
1304			};
1305
1306			pins {
1307				pins = "P0", "P1";
1308				drive-open-drain;
1309			};
1310		};
1311
1312		pinctrl_i2s: i2s {
1313			groups = "SPI_I2S";
1314			function = "I2S";
1315		};
1316
1317		pinctrl_spi: spi {
1318			groups = "SPI_I2S";
1319			function = "SPI";
1320
1321			cs {
1322				pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>,
1323					 <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>;
1324			};
1325		};
1326	};
1327
1328	hwspinlock@0 {
1329		compatible = "sandbox,hwspinlock";
1330	};
1331
1332	dma: dma {
1333		compatible = "sandbox,dma";
1334		#dma-cells = <1>;
1335
1336		dmas = <&dma 0>, <&dma 1>, <&dma 2>;
1337		dma-names = "m2m", "tx0", "rx0";
1338	};
1339
1340	/*
1341	 * keep mdio-mux ahead of mdio so that the mux is removed first at the
1342	 * end of the test.  If parent mdio is removed first, clean-up of the
1343	 * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
1344	 * active at the end of the test.  That it turn doesn't allow the mdio
1345	 * class to be destroyed, triggering an error.
1346	 */
1347	mdio-mux-test {
1348		compatible = "sandbox,mdio-mux";
1349		#address-cells = <1>;
1350		#size-cells = <0>;
1351		mdio-parent-bus = <&mdio>;
1352
1353		mdio-ch-test@0 {
1354			reg = <0>;
1355		};
1356		mdio-ch-test@1 {
1357			reg = <1>;
1358		};
1359	};
1360
1361	mdio: mdio-test {
1362		compatible = "sandbox,mdio";
1363	};
1364
1365	pm-bus-test {
1366		compatible = "simple-pm-bus";
1367		clocks = <&clk_sandbox 4>;
1368		power-domains = <&pwrdom 1>;
1369	};
1370
1371	resetc2: syscon-reset {
1372		compatible = "syscon-reset";
1373		#reset-cells = <1>;
1374		regmap = <&syscon0>;
1375		offset = <1>;
1376		mask = <0x27FFFFFF>;
1377		assert-high = <0>;
1378	};
1379
1380	syscon-reset-test {
1381		compatible = "sandbox,misc_sandbox";
1382		resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
1383		reset-names = "valid", "no_mask", "out_of_range";
1384	};
1385
1386	sysinfo {
1387		compatible = "sandbox,sysinfo-sandbox";
1388	};
1389
1390	some_regmapped-bus {
1391		#address-cells = <0x1>;
1392		#size-cells = <0x1>;
1393
1394		ranges = <0x0 0x0 0x10>;
1395		compatible = "simple-bus";
1396
1397		regmap-test_0 {
1398			reg = <0 0x10>;
1399			compatible = "sandbox,regmap_test";
1400		};
1401	};
1402};
1403
1404#include "sandbox_pmic.dtsi"
1405