1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2019 Google LLC
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <log.h>
9 #include <asm/cpu_common.h>
10 #include <asm/msr.h>
11 #include <asm/arch/cpu.h>
12 #include <asm/arch/iomap.h>
13 #include <power/acpi_pmc.h>
14 
cpu_flush_l1d_to_l2(void)15 void cpu_flush_l1d_to_l2(void)
16 {
17 	struct msr_t msr;
18 
19 	msr = msr_read(MSR_POWER_MISC);
20 	msr.lo |= FLUSH_DL1_L2;
21 	msr_write(MSR_POWER_MISC, msr);
22 }
23 
enable_pm_timer_emulation(const struct udevice * pmc)24 void enable_pm_timer_emulation(const struct udevice *pmc)
25 {
26 	struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(pmc);
27 	msr_t msr;
28 
29 	/*
30 	 * The derived frequency is calculated as follows:
31 	 *    (CTC_FREQ * msr[63:32]) >> 32 = target frequency.
32 	 *
33 	 * Back-solve the multiplier so the 3.579545MHz ACPI timer frequency is
34 	 * used.
35 	 */
36 	msr.hi = (3579545ULL << 32) / CTC_FREQ;
37 
38 	/* Set PM1 timer IO port and enable */
39 	msr.lo = EMULATE_PM_TMR_EN | (upriv->acpi_base + R_ACPI_PM1_TMR);
40 	debug("PM timer %x %x\n", msr.hi, msr.lo);
41 	msr_write(MSR_EMULATE_PM_TIMER, msr);
42 }
43