1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2011 The Chromium OS Authors. 4 * (C) Copyright 2008 5 * Graeme Russ, graeme.russ@gmail.com. 6 */ 7 8 #include <common.h> 9 #include <cpu_func.h> 10 #include <fdtdec.h> 11 #include <init.h> 12 #include <usb.h> 13 #include <asm/global_data.h> 14 #include <asm/io.h> 15 #include <asm/msr.h> 16 #include <asm/mtrr.h> 17 #include <asm/arch/sysinfo.h> 18 #include <asm/arch/timestamp.h> 19 20 DECLARE_GLOBAL_DATA_PTR; 21 arch_cpu_init(void)22int arch_cpu_init(void) 23 { 24 int ret = get_coreboot_info(&lib_sysinfo); 25 if (ret != 0) { 26 printf("Failed to parse coreboot tables.\n"); 27 return ret; 28 } 29 30 timestamp_init(); 31 32 return IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() : 33 x86_cpu_init_f(); 34 } 35 checkcpu(void)36int checkcpu(void) 37 { 38 return 0; 39 } 40 print_cpuinfo(void)41int print_cpuinfo(void) 42 { 43 return default_print_cpuinfo(); 44 } 45 board_final_init(void)46static void board_final_init(void) 47 { 48 /* 49 * Un-cache the ROM so the kernel has one 50 * more MTRR available. 51 * 52 * Coreboot should have assigned this to the 53 * top available variable MTRR. 54 */ 55 u8 top_mtrr = (native_read_msr(MTRR_CAP_MSR) & 0xff) - 1; 56 u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff; 57 58 /* Make sure this MTRR is the correct Write-Protected type */ 59 if (top_type == MTRR_TYPE_WRPROT) { 60 struct mtrr_state state; 61 62 mtrr_open(&state, true); 63 wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0); 64 wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0); 65 mtrr_close(&state, true); 66 } 67 68 if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) { 69 /* 70 * Issue SMI to coreboot to lock down ME and registers 71 * when allowed via device tree 72 */ 73 printf("Finalizing coreboot\n"); 74 outb(0xcb, 0xb2); 75 } 76 } 77 last_stage_init(void)78int last_stage_init(void) 79 { 80 /* start usb so that usb keyboard can be used as input device */ 81 if (CONFIG_IS_ENABLED(USB_KEYBOARD)) 82 usb_init(); 83 84 board_final_init(); 85 86 return 0; 87 } 88