1/dts-v1/; 2 3#include <dt-bindings/gpio/x86-gpio.h> 4 5/include/ "skeleton.dtsi" 6/include/ "keyboard.dtsi" 7/include/ "serial.dtsi" 8/include/ "reset.dtsi" 9/include/ "rtc.dtsi" 10/include/ "tsc_timer.dtsi" 11 12#include "smbios.dtsi" 13 14#ifdef CONFIG_CHROMEOS_VBOOT 15#include "chromeos-x86.dtsi" 16#include "flashmap-x86-ro.dtsi" 17#include "flashmap-8mb-rw.dtsi" 18#endif 19 20/ { 21 model = "Google Samus"; 22 compatible = "google,samus", "intel,broadwell"; 23 24 aliases { 25 spi0 = &spi; 26 usb0 = &usb_0; 27 usb1 = &usb_1; 28 cros-ec0 = &cros_ec; 29 }; 30 31 config { 32 silent_console = <0>; 33 }; 34 35 cpus { 36 #address-cells = <1>; 37 #size-cells = <0>; 38 39 cpu@0 { 40 device_type = "cpu"; 41 compatible = "intel,core-i3-gen5"; 42 reg = <0>; 43 intel,apic-id = <0>; 44 intel,slow-ramp = <3>; 45 }; 46 47 cpu@1 { 48 device_type = "cpu"; 49 compatible = "intel,core-i3-gen5"; 50 reg = <1>; 51 intel,apic-id = <1>; 52 }; 53 54 cpu@2 { 55 device_type = "cpu"; 56 compatible = "intel,core-i3-gen5"; 57 reg = <2>; 58 intel,apic-id = <2>; 59 }; 60 61 cpu@3 { 62 device_type = "cpu"; 63 compatible = "intel,core-i3-gen5"; 64 reg = <3>; 65 intel,apic-id = <3>; 66 }; 67 68 }; 69 70 chosen { 71 stdout-path = "/serial"; 72 }; 73 74 keyboard { 75 intel,duplicate-por; 76 }; 77 78 pch_pinctrl { 79 compatible = "intel,x86-broadwell-pinctrl"; 80 u-boot,dm-pre-reloc; 81 reg = <0 0>; 82 83 /* Put this first: it is the default */ 84 gpio_unused: gpio-unused { 85 u-boot,dm-pre-reloc; 86 mode-gpio; 87 direction = <PIN_INPUT>; 88 owner = <OWNER_GPIO>; 89 sense-disable; 90 }; 91 92 gpio_acpi_sci: acpi-sci { 93 u-boot,dm-pre-reloc; 94 mode-gpio; 95 direction = <PIN_INPUT>; 96 invert; 97 route = <ROUTE_SCI>; 98 }; 99 100 gpio_acpi_smi: acpi-smi { 101 u-boot,dm-pre-reloc; 102 mode-gpio; 103 direction = <PIN_INPUT>; 104 invert; 105 route = <ROUTE_SMI>; 106 }; 107 108 gpio_input: gpio-input { 109 u-boot,dm-pre-reloc; 110 mode-gpio; 111 direction = <PIN_INPUT>; 112 owner = <OWNER_GPIO>; 113 }; 114 115 gpio_input_invert: gpio-input-invert { 116 u-boot,dm-pre-reloc; 117 mode-gpio; 118 direction = <PIN_INPUT>; 119 owner = <OWNER_GPIO>; 120 invert; 121 }; 122 123 gpio_native: gpio-native { 124 u-boot,dm-pre-reloc; 125 }; 126 127 gpio_out_high: gpio-out-high { 128 u-boot,dm-pre-reloc; 129 mode-gpio; 130 direction = <PIN_OUTPUT>; 131 output-value = <1>; 132 owner = <OWNER_GPIO>; 133 sense-disable; 134 }; 135 136 gpio_out_low: gpio-out-low { 137 u-boot,dm-pre-reloc; 138 mode-gpio; 139 direction = <PIN_OUTPUT>; 140 output-value = <0>; 141 owner = <OWNER_GPIO>; 142 sense-disable; 143 }; 144 145 gpio_pirq: gpio-pirq { 146 u-boot,dm-pre-reloc; 147 mode-gpio; 148 direction = <PIN_INPUT>; 149 owner = <OWNER_GPIO>; 150 pirq-apic = <PIRQ_APIC_ROUTE>; 151 }; 152 153 soc_gpio@0 { 154 u-boot,dm-pre-reloc; 155 config = 156 <0 &gpio_unused 0>, /* unused */ 157 <1 &gpio_unused 0>, /* unused */ 158 <2 &gpio_unused 0>, /* unused */ 159 <3 &gpio_unused 0>, /* unused */ 160 <4 &gpio_native 0>, /* native: i2c0_sda_gpio4 */ 161 <5 &gpio_native 0>, /* native: i2c0_scl_gpio5 */ 162 <6 &gpio_native 0>, /* native: i2c1_sda_gpio6 */ 163 <7 &gpio_native 0>, /* native: i2c1_scl_gpio7 */ 164 <8 &gpio_acpi_sci 0>, /* pch_lte_wake_l */ 165 <9 &gpio_input_invert 0>, /* trackpad_int_l (wake) */ 166 <10 &gpio_acpi_sci 0>, /* pch_wlan_wake_l */ 167 <11 &gpio_unused 0>, /* unused */ 168 <12 &gpio_unused 0>, /* unused */ 169 <13 &gpio_pirq 3>, /* trackpad_int_l (pirql) */ 170 <14 &gpio_pirq 4>, /* touch_int_l (pirqm) */ 171 <15 &gpio_unused 0>, /* unused (strap) */ 172 <16 &gpio_input 0>, /* pch_wp */ 173 <17 &gpio_unused 0>, /* unused */ 174 <18 &gpio_unused 0>, /* unused */ 175 <19 &gpio_unused 0>, /* unused */ 176 <20 &gpio_native 0>, /* pcie_wlan_clkreq_l */ 177 <21 &gpio_out_high 0>, /* pp3300_ssd_en */ 178 <22 &gpio_unused 0>, /* unused */ 179 <23 &gpio_out_low 0>, /* pp3300_autobahn_en */ 180 <24 &gpio_unused 0>, /* unused */ 181 <25 &gpio_input 0>, /* ec_in_rw */ 182 <26 &gpio_unused 0>, /* unused */ 183 <27 &gpio_acpi_sci 0>, /* pch_wake_l */ 184 <28 &gpio_unused 0>, /* unused */ 185 <29 &gpio_unused 0>, /* unused */ 186 <30 &gpio_native 0>, /* native: pch_suswarn_l */ 187 <31 &gpio_native 0>, /* native: acok_buf */ 188 <32 &gpio_native 0>, /* native: lpc_clkrun_l */ 189 <33 &gpio_native 0>, /* native: ssd_devslp */ 190 <34 &gpio_acpi_smi 0>, /* ec_smi_l */ 191 <35 &gpio_acpi_smi 0>, /* pch_nmi_dbg_l (route in nmi_en) */ 192 <36 &gpio_acpi_sci 0>, /* ec_sci_l */ 193 <37 &gpio_unused 0>, /* unused */ 194 <38 &gpio_unused 0>, /* unused */ 195 <39 &gpio_unused 0>, /* unused */ 196 <40 &gpio_native 0>, /* native: pch_usb1_oc_l */ 197 <41 &gpio_native 0>, /* native: pch_usb2_oc_l */ 198 <42 &gpio_unused 0>, /* wlan_disable_l */ 199 <43 &gpio_out_high 0>, /* pp1800_codec_en */ 200 <44 &gpio_unused 0>, /* unused */ 201 <45 &gpio_acpi_sci 0>, /* dsp_int - codec wake */ 202 <46 &gpio_pirq 6>, /* hotword_det_l_3v3 (pirqo) - codec irq */ 203 <47 &gpio_out_low 0>, /* ssd_reset_l */ 204 <48 &gpio_unused 0>, /* unused */ 205 <49 &gpio_unused 0>, /* unused */ 206 <50 &gpio_unused 0>, /* unused */ 207 <51 &gpio_unused 0>, /* unused */ 208 <52 &gpio_input 0>, /* sim_det */ 209 <53 &gpio_unused 0>, /* unused */ 210 <54 &gpio_unused 0>, /* unused */ 211 <55 &gpio_unused 0>, /* unused */ 212 <56 &gpio_unused 0>, /* unused */ 213 <57 &gpio_out_high 0>, /* codec_reset_l */ 214 <58 &gpio_unused 0>, /* unused */ 215 <59 &gpio_out_high 0>, /* lte_disable_l */ 216 <60 &gpio_unused 0>, /* unused */ 217 <61 &gpio_native 0>, /* native: pch_sus_stat */ 218 <62 &gpio_native 0>, /* native: pch_susclk */ 219 <63 &gpio_native 0>, /* native: pch_slp_s5_l */ 220 <64 &gpio_unused 0>, /* unused */ 221 <65 &gpio_input 0>, /* ram_id3 */ 222 <66 &gpio_input 0>, /* ram_id3_old (strap) */ 223 <67 &gpio_input 0>, /* ram_id0 */ 224 <68 &gpio_input 0>, /* ram_id1 */ 225 <69 &gpio_input 0>, /* ram_id2 */ 226 <70 &gpio_unused 0>, /* unused */ 227 <71 &gpio_native 0>, /* native: modphy_en */ 228 <72 &gpio_unused 0>, /* unused */ 229 <73 &gpio_unused 0>, /* unused */ 230 <74 &gpio_unused 0>, /* unused */ 231 <75 &gpio_unused 0>, /* unused */ 232 <76 &gpio_unused 0>, /* unused */ 233 <77 &gpio_unused 0>, /* unused */ 234 <78 &gpio_unused 0>, /* unused */ 235 <79 &gpio_unused 0>, /* unused */ 236 <80 &gpio_unused 0>, /* unused */ 237 <81 &gpio_unused 0>, /* unused */ 238 <82 &gpio_native 0>, /* native: ec_rcin_l */ 239 <83 &gpio_native 0>, /* gspi0_cs */ 240 <84 &gpio_native 0>, /* gspi0_clk */ 241 <85 &gpio_native 0>, /* gspi0_miso */ 242 <86 &gpio_native 0>, /* gspi0_mosi (strap) */ 243 <87 &gpio_unused 0>, /* unused */ 244 <88 &gpio_unused 0>, /* unused */ 245 <89 &gpio_out_high 0>, /* pp3300_sd_en */ 246 <90 &gpio_unused 0>, /* unused */ 247 <91 &gpio_unused 0>, /* unused */ 248 <92 &gpio_unused 0>, /* unused */ 249 <93 &gpio_unused 0>, /* unused */ 250 <94 &gpio_unused 0>; /* unused */ 251 }; 252 }; 253 254 pci { 255 compatible = "pci-x86"; 256 #address-cells = <3>; 257 #size-cells = <2>; 258 u-boot,dm-pre-reloc; 259 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 260 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 261 0x01000000 0x0 0x1000 0x1000 0 0xefff>; 262 263 northbridge@0,0 { 264 reg = <0x00000000 0 0 0 0>; 265 compatible = "intel,broadwell-northbridge"; 266 board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>, 267 <&gpio_c 3 0>, <&gpio_c 1 0>; 268 u-boot,dm-pre-reloc; 269 spd { 270 #address-cells = <1>; 271 #size-cells = <0>; 272 u-boot,dm-pre-reloc; 273 samsung_4 { 274 reg = <6>; 275 u-boot,dm-pre-reloc; 276 data = [91 20 f1 03 04 11 05 0b 277 03 11 01 08 0a 00 50 01 278 78 78 90 50 90 11 50 e0 279 10 04 3c 3c 01 90 00 00 280 00 80 00 00 00 00 00 a8 281 00 00 00 00 00 00 00 00 282 00 00 00 00 00 00 00 00 283 00 00 00 00 0f 11 02 00 284 00 00 00 00 00 00 00 00 285 00 00 00 00 00 00 00 00 286 00 00 00 00 00 00 00 00 287 00 00 00 00 00 00 00 00 288 00 00 00 00 00 00 00 00 289 00 00 00 00 00 00 00 00 290 00 00 00 00 00 80 ce 01 291 00 00 55 00 00 00 00 00 292 4b 34 45 38 45 33 30 34 293 45 44 2d 45 47 43 45 20 294 20 20 00 00 80 ce 00 00 295 00 00 00 00 00 00 00 00 296 00 00 00 00 00 00 00 00 297 00 00 00 00 00 00 00 00 298 00 00 00 00 00 00 00 00 299 00 00 00 00 00 00 00 00 300 00 00 00 00 00 00 00 00 301 00 00 00 00 00 00 00 00 302 00 00 00 00 00 00 00 00 303 00 00 00 00 00 00 00 00 304 00 00 00 00 00 00 00 00 305 00 00 00 00 00 00 00 00 306 00 00 00 00 00 00 00 00 307 00 00 00 00 00 00 00 00]; 308 }; 309 hynix-h9ccnnnbltmlar-ntm-lpddr3-32 { 310 /* 311 * banks 8, ranks 2, rows 14, 312 * columns 10, density 4096 mb, x32 313 */ 314 reg = <8>; 315 u-boot,dm-pre-reloc; 316 data = [91 20 f1 03 04 11 05 0b 317 03 11 01 08 0a 00 50 01 318 78 78 90 50 90 11 50 e0 319 10 04 3c 3c 01 90 00 00 320 00 80 00 00 00 00 00 a8 321 00 00 00 00 00 00 00 00 322 00 00 00 00 00 00 00 00 323 00 00 00 00 0f 01 02 00 324 00 00 00 00 00 00 00 00 325 00 00 00 00 00 00 00 00 326 00 00 00 00 00 00 00 00 327 00 00 00 00 00 00 00 00 328 00 00 00 00 00 00 00 00 329 00 00 00 00 00 00 00 00 330 00 00 00 00 00 80 ad 00 331 00 00 55 00 00 00 00 00 332 48 39 43 43 4e 4e 4e 42 333 4c 54 4d 4c 41 52 2d 4e 334 54 4d 00 00 80 ad 00 00 335 00 00 00 00 00 00 00 00 336 00 00 00 00 00 00 00 00 337 00 00 00 00 00 00 00 00 338 00 00 00 00 00 00 00 00 339 00 00 00 00 00 00 00 00 340 00 00 00 00 00 00 00 00 341 00 00 00 00 00 00 00 00 342 00 00 00 00 00 00 00 00 343 00 00 00 00 00 00 00 00 344 00 00 00 00 00 00 00 00 345 00 00 00 00 00 00 00 00 346 00 00 00 00 00 00 00 00 347 00 00 00 00 00 00 00 00]; 348 }; 349 samsung_8 { 350 reg = <10>; 351 u-boot,dm-pre-reloc; 352 data = [91 20 f1 03 04 12 05 0a 353 03 11 01 08 0a 00 50 01 354 78 78 90 50 90 11 50 e0 355 10 04 3c 3c 01 90 00 00 356 00 80 00 00 00 00 00 a8 357 00 00 00 00 00 00 00 00 358 00 00 00 00 00 00 00 00 359 00 00 00 00 0f 11 02 00 360 00 00 00 00 00 00 00 00 361 00 00 00 00 00 00 00 00 362 00 00 00 00 00 00 00 00 363 00 00 00 00 00 00 00 00 364 00 00 00 00 00 00 00 00 365 00 00 00 00 00 00 00 00 366 00 00 00 00 00 80 ce 01 367 00 00 55 00 00 00 00 00 368 4b 34 45 36 45 33 30 34 369 45 44 2d 45 47 43 45 20 370 20 20 00 00 80 ce 00 00 371 00 00 00 00 00 00 00 00 372 00 00 00 00 00 00 00 00 373 00 00 00 00 00 00 00 00 374 00 00 00 00 00 00 00 00 375 00 00 00 00 00 00 00 00 376 00 00 00 00 00 00 00 00 377 00 00 00 00 00 00 00 00 378 00 00 00 00 00 00 00 00 379 00 00 00 00 00 00 00 00 380 00 00 00 00 00 00 00 00 381 00 00 00 00 00 00 00 00 382 00 00 00 00 00 00 00 00 383 00 00 00 00 00 00 00 00]; 384 }; 385 hynix-h9ccnnnbltmlar-ntm-lpddr3-16 { 386 /* 387 * banks 8, ranks 2, rows 14, 388 * columns 11, density 4096 mb, x16 389 */ 390 reg = <12>; 391 u-boot,dm-pre-reloc; 392 data = [91 20 f1 03 04 12 05 0a 393 03 11 01 08 0a 00 50 01 394 78 78 90 50 90 11 50 e0 395 10 04 3c 3c 01 90 00 00 396 00 80 00 00 00 00 00 a8 397 00 00 00 00 00 00 00 00 398 00 00 00 00 00 00 00 00 399 00 00 00 00 0f 01 02 00 400 00 00 00 00 00 00 00 00 401 00 00 00 00 00 00 00 00 402 00 00 00 00 00 00 00 00 403 00 00 00 00 00 00 00 00 404 00 00 00 00 00 00 00 00 405 00 00 00 00 00 00 00 00 406 00 00 00 00 00 80 ad 00 407 00 00 55 00 00 00 00 00 408 48 39 43 43 4e 4e 4e 42 409 4c 54 4d 4c 41 52 2d 4e 410 54 4d 00 00 80 ad 00 00 411 00 00 00 00 00 00 00 00 412 00 00 00 00 00 00 00 00 413 00 00 00 00 00 00 00 00 414 00 00 00 00 00 00 00 00 415 00 00 00 00 00 00 00 00 416 00 00 00 00 00 00 00 00 417 00 00 00 00 00 00 00 00 418 00 00 00 00 00 00 00 00 419 00 00 00 00 00 00 00 00 420 00 00 00 00 00 00 00 00 421 00 00 00 00 00 00 00 00 422 00 00 00 00 00 00 00 00 423 00 00 00 00 00 00 00 00]; 424 }; 425 hynix-h9ccnnncltmlar-lpddr3 { 426 /* 427 * banks 8, ranks 2, rows 15, 428 * columns 11, density 8192 mb, x16 429 */ 430 reg = <13>; 431 u-boot,dm-pre-reloc; 432 data = [91 20 f1 03 05 1a 05 0a 433 03 11 01 08 0a 00 50 01 434 78 78 90 50 90 11 50 e0 435 90 06 3c 3c 01 90 00 00 436 00 80 00 00 00 00 00 a8 437 00 00 00 00 00 00 00 00 438 00 00 00 00 00 00 00 00 439 00 00 00 00 0f 01 02 00 440 00 00 00 00 00 00 00 00 441 00 00 00 00 00 00 00 00 442 00 00 00 00 00 00 00 00 443 00 00 00 00 00 00 00 00 444 00 00 00 00 00 00 00 00 445 00 00 00 00 00 00 00 00 446 00 00 00 00 00 80 ad 00 447 00 00 55 00 00 00 00 00 448 48 39 43 43 4e 4e 4e 43 449 4c 54 4d 4c 41 52 00 00 450 00 00 00 00 80 ad 00 00 451 00 00 00 00 00 00 00 00 452 00 00 00 00 00 00 00 00 453 00 00 00 00 00 00 00 00 454 00 00 00 00 00 00 00 00 455 00 00 00 00 00 00 00 00 456 00 00 00 00 00 00 00 00 457 00 00 00 00 00 00 00 00 458 00 00 00 00 00 00 00 00 459 00 00 00 00 00 00 00 00 460 00 00 00 00 00 00 00 00 461 00 00 00 00 00 00 00 00 462 00 00 00 00 00 00 00 00 463 00 00 00 00 00 00 00 00]; 464 }; 465 elpida-edfb232a1ma { 466 /* 467 * banks 8, ranks 2, rows 15, 468 * columns 11, density 8192 mb, x16 469 */ 470 reg = <15>; 471 u-boot,dm-pre-reloc; 472 data = [91 20 f1 03 05 1a 05 0a 473 03 11 01 08 0a 00 50 01 474 78 78 90 50 90 11 50 e0 475 90 06 3c 3c 01 90 00 00 476 00 80 00 00 00 00 00 a8 477 00 00 00 00 00 00 00 00 478 00 00 00 00 00 00 00 00 479 00 00 00 00 0f 01 02 00 480 00 00 00 00 00 00 00 00 481 00 00 00 00 00 00 00 00 482 00 00 00 00 00 00 00 00 483 00 00 00 00 00 00 00 00 484 00 00 00 00 00 00 00 00 485 00 00 00 00 00 00 00 00 486 00 00 00 00 00 02 fe 00 487 00 00 00 00 00 00 00 00 488 45 44 46 42 32 33 32 41 489 31 4d 41 2d 47 44 2d 46 490 00 00 00 00 02 fe 00 00 491 00 00 00 00 00 00 00 00 492 00 00 00 00 00 00 00 00 493 00 00 00 00 00 00 00 00 494 00 00 00 00 00 00 00 00 495 00 00 00 00 00 00 00 00 496 00 00 00 00 00 00 00 00 497 00 00 00 00 00 00 00 00 498 00 00 00 00 00 00 00 00 499 00 00 00 00 00 00 00 00 500 00 00 00 00 00 00 00 00 501 00 00 00 00 00 00 00 00 502 00 00 00 00 00 00 00 00 503 00 00 00 00 00 00 00 00]; 504 }; 505 }; 506 }; 507 508 gma@2,0 { 509 reg = <0x00001000 0 0 0 0>; 510 compatible = "intel,broadwell-igd"; 511 intel,dp-hotplug = <6 6 6>; 512 intel,port-select = <1>; /* eDP */ 513 intel,power-cycle-delay = <6>; 514 intel,power-up-delay = <2000>; 515 intel,power-down-delay = <500>; 516 intel,power-backlight-on-delay = <2000>; 517 intel,power-backlight-off-delay = <2000>; 518 intel,cpu-backlight = <0x00000200>; 519 intel,pch-backlight = <0x04000200>; 520 intel,pre-graphics-delay = <200>; 521 }; 522 523 adsp@13,0 { 524 reg = <0x00009800 0 0 0 0>; 525 compatible = "intel,wildcatpoint-adsp"; 526 intel,adsp-d3-pg-enable = <0>; 527 intel,adsp-sram-pg-enable = <0>; 528 intel,sio-acpi-mode; 529 #address-cells = <1>; 530 #size-cells = <0>; 531 532 i2s: shim { 533 compatible = "intel,broadwell-i2s"; 534 #sound-dai-cells = <1>; 535 reg = <0xfb000 0xfc000 0xfd000>; 536 }; 537 }; 538 539 usb_1: usb@14,0 { 540 reg = <0x0000a000 0 0 0 0>; 541 compatible = "xhci-pci"; 542 }; 543 544 i2c0: i2c@15,1 { 545 reg = <0x0000a900 0 0 0 0>; 546 compatible = "snps,designware-i2c"; 547 #address-cells = <1>; 548 #size-cells = <0>; 549 550 rt5677: rt5677@2c { 551 compatible = "realtek,rt5677"; 552 #sound-dai-cells = <1>; 553 reg = <0x2c>; 554 }; 555 }; 556 557 me@16,0 { 558 reg = <0x0000b000 0 0 0 0>; 559 compatible = "intel,me"; 560 u-boot,dm-pre-reloc; 561 }; 562 563 usb_0: usb@1d,0 { 564 status = "disabled"; 565 reg = <0x0000e800 0 0 0 0>; 566 compatible = "ehci-pci"; 567 }; 568 569 pch: pch@1f,0 { 570 reg = <0x0000f800 0 0 0 0>; 571 compatible = "intel,broadwell-pch"; 572 u-boot,dm-pre-reloc; 573 #address-cells = <1>; 574 #size-cells = <1>; 575 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b 576 0x80 0x80 0x80 0x80>; 577 intel,gpi-routing = <0 0 0 0 0 0 0 2 578 1 0 0 0 0 0 0 0>; 579 /* Enable EC SMI source */ 580 intel,alt-gp-smi-enable = <0x0040>; 581 582 /* EC-SCI is GPIO36 */ 583 intel,gpe0-en = <0 0x10 0 0>; 584 585 power-enable-gpio = <&gpio_a 23 0>; 586 587 spi: spi { 588 u-boot,dm-pre-reloc; 589 #address-cells = <1>; 590 #size-cells = <0>; 591 compatible = "intel,ich9-spi"; 592 fwstore_spi: spi-flash@0 { 593 u-boot,dm-pre-reloc; 594 #size-cells = <1>; 595 #address-cells = <1>; 596 reg = <0>; 597 compatible = "winbond,w25q64", 598 "jedec,spi-nor"; 599 memory-map = <0xff800000 0x00800000>; 600 rw-mrc-cache { 601 u-boot,dm-pre-reloc; 602 label = "rw-mrc-cache"; 603 reg = <0x003e0000 0x00010000>; 604 }; 605 }; 606 }; 607 608 gpio_a: gpioa { 609 compatible = "intel,broadwell-gpio"; 610 u-boot,dm-pre-reloc; 611 #gpio-cells = <2>; 612 gpio-controller; 613 reg = <0 0>; 614 bank-name = "A"; 615 }; 616 617 gpio_b: gpiob { 618 compatible = "intel,broadwell-gpio"; 619 u-boot,dm-pre-reloc; 620 #gpio-cells = <2>; 621 gpio-controller; 622 reg = <1 0>; 623 bank-name = "B"; 624 }; 625 626 gpio_c: gpioc { 627 compatible = "intel,broadwell-gpio"; 628 u-boot,dm-pre-reloc; 629 #gpio-cells = <2>; 630 gpio-controller; 631 reg = <2 0>; 632 bank-name = "C"; 633 }; 634 635 lpc { 636 compatible = "intel,broadwell-lpc"; 637 #address-cells = <1>; 638 #size-cells = <0>; 639 u-boot,dm-pre-reloc; 640 intel,gen-dec = <0x800 0xfc 0x900 0xfc>; 641 cros_ec: cros-ec { 642 u-boot,dm-pre-reloc; 643 compatible = "google,cros-ec-lpc"; 644 reg = <0x204 1 0x200 1 0x880 0x80>; 645 646 /* 647 * Describes the flash memory within 648 * the EC 649 */ 650 #address-cells = <1>; 651 #size-cells = <1>; 652 flash@8000000 { 653 reg = <0x08000000 0x20000>; 654 erase-value = <0xff>; 655 }; 656 }; 657 }; 658 }; 659 660 sata@1f,2 { 661 compatible = "intel,wildcatpoint-ahci"; 662 reg = <0x0000fa00 0 0 0 0>; 663 u-boot,dm-pre-proper; 664 intel,sata-mode = "ahci"; 665 intel,sata-port-map = <1>; 666 intel,sata-port0-gen3-tx = <0x72>; 667 reset-gpio = <&gpio_b 15 GPIO_ACTIVE_LOW>; 668 }; 669 670 smbus: smbus@1f,3 { 671 compatible = "intel,ich-i2c"; 672 reg = <0x0000fb00 0 0 0 0>; 673 u-boot,dm-pre-reloc; 674 }; 675 }; 676 677 tpm { 678 u-boot,dm-pre-reloc; 679 reg = <0xfed40000 0x5000>; 680 compatible = "infineon,slb9635lpc"; 681 secdata { 682 u-boot,dm-pre-reloc; 683 compatible = "google,tpm-secdata"; 684 }; 685 }; 686 687 microcode { 688 u-boot,dm-pre-reloc; 689 update@0 { 690 u-boot,dm-pre-reloc; 691#include "microcode/mc0306d4_00000018.dtsi" 692 }; 693 }; 694 695 sound { 696 compatible = "google,samus-sound"; 697 codec-enable-gpio = <&gpio_b 11 GPIO_ACTIVE_HIGH>; 698 cpu { 699 sound-dai = <&i2s 0>; 700 }; 701 702 codec { 703 sound-dai = <&rt5677 0>; 704 }; 705 }; 706 707}; 708 709&rtc { 710 #address-cells = <1>; 711 #size-cells = <0>; 712 nvdata { 713 u-boot,dm-pre-reloc; 714 compatible = "google,cmos-nvdata"; 715 reg = <0x26>; 716 }; 717}; 718