1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2002-2010 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 */ 6 7 #ifndef __ASM_GBL_DATA_H 8 #define __ASM_GBL_DATA_H 9 10 #ifndef __ASSEMBLY__ 11 12 #include <asm/processor.h> 13 #include <asm/mrccache.h> 14 15 enum pei_boot_mode_t { 16 PEI_BOOT_NONE = 0, 17 PEI_BOOT_SOFT_RESET, 18 PEI_BOOT_RESUME, 19 20 }; 21 22 struct dimm_info { 23 uint32_t dimm_size; 24 uint16_t ddr_type; 25 uint16_t ddr_frequency; 26 uint8_t rank_per_dimm; 27 uint8_t channel_num; 28 uint8_t dimm_num; 29 uint8_t bank_locator; 30 /* The 5th byte is '\0' for the end of string */ 31 uint8_t serial[5]; 32 /* The 19th byte is '\0' for the end of string */ 33 uint8_t module_part_number[19]; 34 uint16_t mod_id; 35 uint8_t mod_type; 36 uint8_t bus_width; 37 } __packed; 38 39 struct pei_memory_info { 40 uint8_t dimm_cnt; 41 /* Maximum num of dimm is 8 */ 42 struct dimm_info dimm[8]; 43 } __packed; 44 45 struct memory_area { 46 uint64_t start; 47 uint64_t size; 48 }; 49 50 struct memory_info { 51 int num_areas; 52 uint64_t total_memory; 53 uint64_t total_32bit_memory; 54 struct memory_area area[CONFIG_NR_DRAM_BANKS]; 55 }; 56 57 #define MAX_MTRR_REQUESTS 8 58 59 /** 60 * A request for a memory region to be set up in a particular way. These 61 * requests are processed before board_init_r() is called. They are generally 62 * optional and can be ignored with some performance impact. 63 */ 64 struct mtrr_request { 65 int type; /* MTRR_TYPE_... */ 66 uint64_t start; 67 uint64_t size; 68 }; 69 70 /** 71 * struct mrc_output - holds the MRC data 72 * 73 * @buf: MRC training data to save for the next boot. This is set to point to 74 * the raw data after SDRAM init is complete. Then mrccache_setup() 75 * turns it into a proper cache record with a checksum 76 * @len: Length of @buf 77 * @cache: Resulting cache record 78 */ 79 struct mrc_output { 80 char *buf; 81 uint len; 82 struct mrc_data_container *cache; 83 }; 84 85 /* Architecture-specific global data */ 86 struct arch_global_data { 87 u64 gdt[X86_GDT_NUM_ENTRIES] __aligned(16); 88 struct global_data *gd_addr; /* Location of Global Data */ 89 uint8_t x86; /* CPU family */ 90 uint8_t x86_vendor; /* CPU vendor */ 91 uint8_t x86_model; 92 uint8_t x86_mask; 93 uint32_t x86_device; 94 uint64_t tsc_base; /* Initial value returned by rdtsc() */ 95 bool tsc_inited; /* true if tsc is ready for use */ 96 unsigned long clock_rate; /* Clock rate of timer in Hz */ 97 void *new_fdt; /* Relocated FDT */ 98 uint32_t bist; /* Built-in self test value */ 99 enum pei_boot_mode_t pei_boot_mode; 100 const struct pch_gpio_map *gpio_map; /* board GPIO map */ 101 struct memory_info meminfo; /* Memory information */ 102 struct pei_memory_info pei_meminfo; /* PEI memory information */ 103 #ifdef CONFIG_USE_HOB 104 void *hob_list; /* FSP HOB list */ 105 #endif 106 struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS]; 107 int mtrr_req_count; 108 int has_mtrr; 109 /* MRC training data */ 110 struct mrc_output mrc[MRC_TYPE_COUNT]; 111 ulong table; /* Table pointer from previous loader */ 112 int turbo_state; /* Current turbo state */ 113 struct irq_routing_table *pirq_routing_table; 114 int dw_i2c_num_cards; /* Used by designware i2c driver */ 115 #ifdef CONFIG_SEABIOS 116 u32 high_table_ptr; 117 u32 high_table_limit; 118 #endif 119 int prev_sleep_state; /* Previous sleep state ACPI_S0/1../5 */ 120 ulong backup_mem; /* Backup memory address for S3 */ 121 #ifdef CONFIG_FSP_VERSION2 122 struct fsp_header *fsp_s_hdr; /* Pointer to FSP-S header */ 123 #endif 124 void *itss_priv; /* Private ITSS data pointer */ 125 ulong acpi_start; /* Start address of ACPI tables */ 126 ulong coreboot_table; /* Address of coreboot table */ 127 }; 128 129 #endif 130 131 #include <asm-generic/global_data.h> 132 133 #ifndef __ASSEMBLY__ 134 # if defined(CONFIG_EFI_APP) || CONFIG_IS_ENABLED(X86_64) 135 136 /* TODO(sjg@chromium.org): Consider using a fixed register for gd on x86_64 */ 137 #define gd global_data_ptr 138 139 #define DECLARE_GLOBAL_DATA_PTR extern struct global_data *global_data_ptr 140 # else get_fs_gd_ptr(void)141static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void) 142 { 143 gd_t *gd_ptr; 144 145 #if CONFIG_IS_ENABLED(X86_64) 146 asm volatile("fs mov 0, %0\n" : "=r" (gd_ptr)); 147 #else 148 asm volatile("fs movl 0, %0\n" : "=r" (gd_ptr)); 149 #endif 150 151 return gd_ptr; 152 } 153 154 #define gd get_fs_gd_ptr() 155 156 #define DECLARE_GLOBAL_DATA_PTR 157 # endif 158 159 #endif 160 161 #endif /* __ASM_GBL_DATA_H */ 162