1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2009 4 * Graeme Russ, graeme.russ@gmail.com 5 * 6 * (C) Copyright 2002 7 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se 8 */ 9 10 #ifndef __ASM_INTERRUPT_H_ 11 #define __ASM_INTERRUPT_H_ 1 12 13 #include <asm/types.h> 14 15 #define SYS_NUM_IRQS 16 16 17 /* Architecture defined exceptions */ 18 enum x86_exception { 19 EXC_DE = 0, 20 EXC_DB, 21 EXC_NMI, 22 EXC_BP, 23 EXC_OF, 24 EXC_BR, 25 EXC_UD, 26 EXC_NM, 27 EXC_DF, 28 EXC_CSO, 29 EXC_TS, 30 EXC_NP, 31 EXC_SS, 32 EXC_GP, 33 EXC_PF, 34 EXC_MF = 16, 35 EXC_AC, 36 EXC_MC, 37 EXC_XM, 38 EXC_VE 39 }; 40 41 /** 42 * struct idt_ptr - Holds the IDT (Interrupt Descriptor Table) 43 * 44 * @size: Size of IDT in bytes 45 */ 46 struct idt_ptr { 47 unsigned short size; 48 unsigned long address; 49 } __packed; 50 51 /* arch/x86/cpu/interrupts.c */ 52 void set_vector(u8 intnum, void *routine); 53 54 /* Architecture specific functions */ 55 void mask_irq(int irq); 56 void unmask_irq(int irq); 57 void specific_eoi(int irq); 58 59 extern char exception_stack[]; 60 61 /** 62 * configure_irq_trigger() - Configure IRQ triggering 63 * 64 * Switch the given interrupt to be level / edge triggered 65 * 66 * @param int_num legacy interrupt number (3-7, 9-15) 67 * @param is_level_triggered true for level triggered interrupt, false for 68 * edge triggered interrupt 69 */ 70 void configure_irq_trigger(int int_num, bool is_level_triggered); 71 72 void *x86_get_idt(void); 73 74 /** 75 * interrupt_read_idt() - Read the IDT 76 * 77 * @ptr: Place to put IDT contents 78 */ 79 void interrupt_read_idt(struct idt_ptr *ptr); 80 81 #endif 82