1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2018 Google, Inc
4 */
5
6 #include <common.h>
7 #include <debug_uart.h>
8 #include <dm.h>
9 #include <hang.h>
10 #include <image.h>
11 #include <init.h>
12 #include <log.h>
13 #include <spl.h>
14 #include <asm/cpu.h>
15 #include <asm/global_data.h>
16 #include <asm/mtrr.h>
17 #include <asm/processor.h>
18 #include <asm-generic/sections.h>
19
20 DECLARE_GLOBAL_DATA_PTR;
21
arch_cpu_init_dm(void)22 __weak int arch_cpu_init_dm(void)
23 {
24 return 0;
25 }
26
x86_tpl_init(void)27 static int x86_tpl_init(void)
28 {
29 int ret;
30
31 debug("%s starting\n", __func__);
32 ret = x86_cpu_init_tpl();
33 if (ret) {
34 debug("%s: x86_cpu_init_tpl() failed\n", __func__);
35 return ret;
36 }
37 ret = spl_init();
38 if (ret) {
39 debug("%s: spl_init() failed\n", __func__);
40 return ret;
41 }
42 ret = arch_cpu_init();
43 if (ret) {
44 debug("%s: arch_cpu_init() failed\n", __func__);
45 return ret;
46 }
47 ret = arch_cpu_init_dm();
48 if (ret) {
49 debug("%s: arch_cpu_init_dm() failed\n", __func__);
50 return ret;
51 }
52 preloader_console_init();
53
54 return 0;
55 }
56
board_init_f(ulong flags)57 void board_init_f(ulong flags)
58 {
59 int ret;
60
61 ret = x86_tpl_init();
62 if (ret) {
63 debug("Error %d\n", ret);
64 panic("x86_tpl_init fail");
65 }
66
67 /* Uninit CAR and jump to board_init_f_r() */
68 board_init_r(gd, 0);
69 }
70
board_init_f_r(void)71 void board_init_f_r(void)
72 {
73 /* Not used since we never call board_init_f_r_trampoline() */
74 while (1);
75 }
76
spl_boot_device(void)77 u32 spl_boot_device(void)
78 {
79 return IS_ENABLED(CONFIG_CHROMEOS_VBOOT) ? BOOT_DEVICE_CROS_VBOOT :
80 BOOT_DEVICE_SPI_MMAP;
81 }
82
spl_start_uboot(void)83 int spl_start_uboot(void)
84 {
85 return 0;
86 }
87
spl_board_announce_boot_device(void)88 void spl_board_announce_boot_device(void)
89 {
90 printf("SPI flash");
91 }
92
spl_board_load_image(struct spl_image_info * spl_image,struct spl_boot_device * bootdev)93 static int spl_board_load_image(struct spl_image_info *spl_image,
94 struct spl_boot_device *bootdev)
95 {
96 spl_image->size = CONFIG_SYS_MONITOR_LEN; /* We don't know SPL size */
97 spl_image->entry_point = CONFIG_SPL_TEXT_BASE;
98 spl_image->load_addr = CONFIG_SPL_TEXT_BASE;
99 spl_image->os = IH_OS_U_BOOT;
100 spl_image->name = "U-Boot";
101
102 debug("Loading to %lx\n", spl_image->load_addr);
103
104 return 0;
105 }
106 SPL_LOAD_IMAGE_METHOD("SPI", 5, BOOT_DEVICE_SPI_MMAP, spl_board_load_image);
107
spl_spi_load_image(void)108 int spl_spi_load_image(void)
109 {
110 return -EPERM;
111 }
112
jump_to_image_no_args(struct spl_image_info * spl_image)113 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
114 {
115 debug("Jumping to %s at %lx\n", spl_phase_name(spl_next_phase()),
116 (ulong)spl_image->entry_point);
117 #ifdef DEBUG
118 print_buffer(spl_image->entry_point, (void *)spl_image->entry_point, 1,
119 0x20, 0);
120 #endif
121 jump_to_spl(spl_image->entry_point);
122 hang();
123 }
124
spl_board_init(void)125 void spl_board_init(void)
126 {
127 preloader_console_init();
128 }
129
130 #if !CONFIG_IS_ENABLED(PCI)
131 /*
132 * This is a fake PCI bus for TPL when it doesn't have proper PCI. It is enough
133 * to bind the devices on the PCI bus, some of which have early-regs properties
134 * providing fixed BARs. Individual drivers program these BARs themselves so
135 * that they can access the devices. The BARs are allocated statically in the
136 * device tree.
137 *
138 * Once SPL is running it enables PCI properly, but does not auto-assign BARs
139 * for devices, so the TPL BARs continue to be used. Once U-Boot starts it does
140 * the auto allocation (after relocation).
141 */
142 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
143 static const struct udevice_id tpl_fake_pci_ids[] = {
144 { .compatible = "pci-x86" },
145 { }
146 };
147 #endif
148
149 U_BOOT_DRIVER(pci_x86) = {
150 .name = "pci_x86",
151 .id = UCLASS_SIMPLE_BUS,
152 .of_match = of_match_ptr(tpl_fake_pci_ids),
153 };
154 #endif
155