1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2016 Broadcom Ltd.
4 */
5 #include <common.h>
6 #include <cpu_func.h>
7 #include <init.h>
8 #include <asm/cache.h>
9 #include <asm/global_data.h>
10 #include <asm/system.h>
11 #include <asm/armv8/mmu.h>
12
13 static struct mm_region ns2_mem_map[] = {
14 {
15 .virt = 0x0UL,
16 .phys = 0x0UL,
17 .size = 0x80000000UL,
18 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
19 PTE_BLOCK_NON_SHARE |
20 PTE_BLOCK_PXN | PTE_BLOCK_UXN
21 }, {
22 .virt = 0x80000000UL,
23 .phys = 0x80000000UL,
24 .size = 0xff80000000UL,
25 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
26 PTE_BLOCK_INNER_SHARE
27 }, {
28 /* List terminator */
29 0,
30 }
31 };
32
33 struct mm_region *mem_map = ns2_mem_map;
34
35 DECLARE_GLOBAL_DATA_PTR;
36
board_init(void)37 int board_init(void)
38 {
39 return 0;
40 }
41
dram_init(void)42 int dram_init(void)
43 {
44 gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
45 PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE);
46 return 0;
47 }
48
dram_init_banksize(void)49 int dram_init_banksize(void)
50 {
51 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
52 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
53
54 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
55 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
56
57 return 0;
58 }
59
reset_cpu(ulong addr)60 void reset_cpu(ulong addr)
61 {
62 psci_system_reset();
63 }
64