1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2014 Freescale Semiconductor, Inc.
4  */
5 
6 #include <common.h>
7 #include <log.h>
8 #include <asm/global_data.h>
9 #include <asm/immap_85xx.h>
10 #include "sleep.h"
11 #ifdef CONFIG_U_QE
12 #include <fsl_qe.h>
13 #endif
14 
15 DECLARE_GLOBAL_DATA_PTR;
16 
board_mem_sleep_setup(void)17 void __weak board_mem_sleep_setup(void)
18 {
19 }
20 
board_sleep_prepare(void)21 void __weak board_sleep_prepare(void)
22 {
23 }
24 
is_warm_boot(void)25 bool is_warm_boot(void)
26 {
27 	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
28 
29 	if (in_be32(&gur->scrtsr[0]) & DCFG_CCSR_CRSTSR_WDRFR)
30 		return 1;
31 
32 	return 0;
33 }
34 
fsl_dp_disable_console(void)35 void fsl_dp_disable_console(void)
36 {
37 	gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
38 }
39 
40 /*
41  * When wakeup from deep sleep, the first 128 bytes space
42  * will be used to do DDR training which corrupts the data
43  * in there. This function will restore them.
44  */
dp_ddr_restore(void)45 static void dp_ddr_restore(void)
46 {
47 	u64 *src, *dst;
48 	int i;
49 	struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
50 
51 	/* get the address of ddr date from SPARECR3 */
52 	src = (u64 *)(in_be32(&scfg->sparecr[2]) + DDR_BUFF_LEN - 8);
53 	dst = (u64 *)(CONFIG_SYS_SDRAM_BASE + DDR_BUFF_LEN - 8);
54 
55 	for (i = 0; i < DDR_BUFF_LEN / 8; i++)
56 		*dst-- = *src--;
57 
58 	flush_dcache();
59 }
60 
dp_resume_prepare(void)61 static void dp_resume_prepare(void)
62 {
63 	dp_ddr_restore();
64 
65 	board_sleep_prepare();
66 
67 	l2cache_init();
68 #if defined(CONFIG_RAMBOOT_PBL)
69 	disable_cpc_sram();
70 #endif
71 	enable_cpc();
72 
73 #ifdef CONFIG_U_QE
74 	u_qe_resume();
75 #endif
76 
77 }
78 
fsl_dp_resume(void)79 int fsl_dp_resume(void)
80 {
81 	u32 start_addr;
82 	void (*kernel_resume)(void);
83 	struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
84 
85 	if (!is_warm_boot())
86 		return 0;
87 
88 	dp_resume_prepare();
89 
90 	/* Get the entry address and jump to kernel */
91 	start_addr = in_be32(&scfg->sparecr[1]);
92 	debug("Entry address is 0x%08x\n", start_addr);
93 	kernel_resume = (void (*)(void))start_addr;
94 	kernel_resume();
95 
96 	return 0;
97 }
98