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Kconfig A D18-Mar-2022727 3425

MAINTAINERS A D18-Mar-2022527 1615

Makefile A D18-Mar-2022177 125

README A D18-Mar-20222.1 KiB6560

ddr.c A D18-Mar-20223.4 KiB147103

ddr.h A D18-Mar-20221.8 KiB6241

eth.c A D18-Mar-202212.5 KiB500416

ls1043aqds.c A D18-Mar-202212.8 KiB633501

ls1043aqds_pbi.cfg A D18-Mar-2022280 1514

ls1043aqds_qixis.h A D18-Mar-2022900 3922

ls1043aqds_rcw_nand.cfg A D18-Mar-2022209 87

ls1043aqds_rcw_sd_ifc.cfg A D18-Mar-2022224 98

ls1043aqds_rcw_sd_qspi.cfg A D18-Mar-2022224 98

README

1Overview
2--------
3The LS1043A Development System (QDS) is a high-performance computing,
4evaluation, and development platform that supports the QorIQ LS1043A
5LayerScape Architecture processor. The LS1043AQDS provides SW development
6platform for the Freescale LS1043A processor series, with a complete
7debugging environment.
8
9LS1043A SoC Overview
10--------------------
11Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1043A
12SoC overview.
13
14 LS1043AQDS board Overview
15 -----------------------
16 - SERDES Connections, 4 lanes supporting:
17      - PCI Express - 3.0
18      - SGMII, SGMII 2.5
19      - QSGMII
20      - SATA 3.0
21      - XFI
22 - DDR Controller
23     - 2GB 40bits (8-bits ECC) DDR4 SDRAM. Support rates of up to 1600MT/s
24 -IFC/Local Bus
25    - One in-socket 128 MB NOR flash 16-bit data bus
26    - One 512 MB NAND flash with ECC support
27    - PromJet Port
28    - FPGA connection
29 - USB 3.0
30    - Three high speed USB 3.0 ports
31    - First USB 3.0 port configured as Host with Type-A connector
32    - The other two USB 3.0 ports configured as OTG with micro-AB connector
33 - SDHC port connects directly to an adapter card slot, featuring:
34    - Optional clock feedback paths, and optional high-speed voltage translation assistance
35    - SD slots for SD, SDHC (1x, 4x, 8x), and/or MMC
36    - eMMC memory devices
37 - DSPI: Onboard support for three SPI flash memory devices
38 - 4 I2C controllers
39 - One SATA onboard connectors
40 - UART
41   - Two 4-pin serial ports at up to 115.2 Kbit/s
42   - Two DB9 D-Type connectors supporting one Serial port each
43 - ARM JTAG support
44
45Memory map from core's view
46----------------------------
47Start Address	End Address	Description		Size
480x00_0000_0000	0x00_000F_FFFF	Secure Boot ROM		1MB
490x00_0100_0000	0x00_0FFF_FFFF	CCSRBAR			240MB
500x00_1000_0000	0x00_1000_FFFF	OCRAM0			64KB
510x00_1001_0000	0x00_1001_FFFF	OCRAM1			64KB
520x00_2000_0000	0x00_20FF_FFFF	DCSR			16MB
530x00_6000_0000	0x00_67FF_FFFF	IFC - NOR Flash		128MB
540x00_7E80_0000	0x00_7E80_FFFF	IFC - NAND Flash	64KB
550x00_7FB0_0000	0x00_7FB0_0FFF	IFC - FPGA		4KB
560x00_8000_0000	0x00_FFFF_FFFF	DRAM1			2GB
57
58Booting Options
59---------------
60a) Promjet Boot
61b) NOR boot
62c) NAND boot
63d) SD boot
64e) QSPI boot
65