1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2019 NXP
4 */
5 #include <common.h>
6 #include <fdt_support.h>
7 #include <net.h>
8 #include <asm/io.h>
9 #include <netdev.h>
10 #include <fm_eth.h>
11 #include <fsl_dtsec.h>
12 #include <fsl_mdio.h>
13 #include <malloc.h>
14
15 #include "../common/fman.h"
16
board_eth_init(struct bd_info * bis)17 int board_eth_init(struct bd_info *bis)
18 {
19 #ifdef CONFIG_FMAN_ENET
20 struct memac_mdio_info dtsec_mdio_info;
21 struct mii_dev *dev;
22 u32 srds_s1;
23 struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
24
25 srds_s1 = in_be32(&gur->rcwsr[4]) &
26 FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
27 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
28
29 dtsec_mdio_info.regs =
30 (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
31
32 dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
33
34 /* Register the 1G MDIO bus */
35 fm_memac_mdio_init(bis, &dtsec_mdio_info);
36
37 /* QSGMII on lane B, MAC 6/5/10/1 */
38 fm_info_set_phy_address(FM1_DTSEC6, QSGMII_PORT1_PHY_ADDR);
39 fm_info_set_phy_address(FM1_DTSEC5, QSGMII_PORT2_PHY_ADDR);
40 fm_info_set_phy_address(FM1_DTSEC10, QSGMII_PORT3_PHY_ADDR);
41 fm_info_set_phy_address(FM1_DTSEC1, QSGMII_PORT4_PHY_ADDR);
42
43 switch (srds_s1) {
44 case 0x3040:
45 break;
46 default:
47 printf("Invalid SerDes protocol 0x%x for LS1046AFRWY\n",
48 srds_s1);
49 break;
50 }
51
52 dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
53 fm_info_set_mdio(FM1_DTSEC6, dev);
54 fm_info_set_mdio(FM1_DTSEC5, dev);
55 fm_info_set_mdio(FM1_DTSEC10, dev);
56 fm_info_set_mdio(FM1_DTSEC1, dev);
57
58 fm_disable_port(FM1_DTSEC9);
59
60 cpu_eth_init(bis);
61 #endif
62
63 return pci_eth_init(bis);
64 }
65
66 #ifdef CONFIG_FMAN_ENET
fdt_update_ethernet_dt(void * blob)67 int fdt_update_ethernet_dt(void *blob)
68 {
69 u32 srds_s1;
70 int i, prop;
71 int offset, nodeoff;
72 const char *path;
73 struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
74
75 srds_s1 = in_be32(&gur->rcwsr[4]) &
76 FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
77 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
78
79 /* Cycle through all aliases */
80 for (prop = 0; ; prop++) {
81 const char *name;
82
83 /* FDT might have been edited, recompute the offset */
84 offset = fdt_first_property_offset(blob,
85 fdt_path_offset(blob,
86 "/aliases")
87 );
88 /* Select property number 'prop' */
89 for (i = 0; i < prop; i++)
90 offset = fdt_next_property_offset(blob, offset);
91
92 if (offset < 0)
93 break;
94
95 path = fdt_getprop_by_offset(blob, offset, &name, NULL);
96 nodeoff = fdt_path_offset(blob, path);
97
98 switch (srds_s1) {
99 case 0x3040:
100 if (!strcmp(name, "ethernet1"))
101 fdt_status_disabled(blob, nodeoff);
102 if (!strcmp(name, "ethernet2"))
103 fdt_status_disabled(blob, nodeoff);
104 if (!strcmp(name, "ethernet3"))
105 fdt_status_disabled(blob, nodeoff);
106 if (!strcmp(name, "ethernet6"))
107 fdt_status_disabled(blob, nodeoff);
108 break;
109 default:
110 printf("%s:Invalid SerDes prtcl 0x%x for LS1046AFRWY\n",
111 __func__, srds_s1);
112 break;
113 }
114 }
115
116 return 0;
117 }
118 #endif
119