1Overview 2-------- 3The LX2160A Reference Design (RDB) is a high-performance computing, 4evaluation, and development platform that supports the QorIQ LX2160A 5Layerscape Architecture processor and its personalities. 6 7LX2160A SoC Overview 8-------------------------------------- 9For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc 10 11LX2160ARDB board Overview 12---------------------- 13DDR Memory 14 Two ports of 72-bits (8-bits ECC) DDR4. 15 Each port supports four chip-selects and two DIMM 16 connectors. Data rate upto 3.2 GT/s. 17 18SERDES ports 19 Thress serdes controllers (24 lanes) 20 Serdes1: Supports two USXGMII connectors, each connected through 21 Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi 22 IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi 23 CS4223 phy. 24 25 Serdes2: Supports one PCIe x4 (Gen1/2/3/4) connector, four SATA 3.0 26 connectors 27 28 Serdes3: Supports one PCIe x8 (Gen1/2/3/4) connector 29 30eSDHC 31 eSDHC1: Supports a SD connector for connecting SD cards 32 eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC 33 34Octal SPI (XSPI) 35 Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator 36 for off-board emulation 37 38I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer 39 Serial Ports 40 41USB 3.0 42 Two high speed USB 3.0 ports. First USB 3.0 port configured as 43 Host with Type-A connector, second USB 3.0 port configured as OTG 44 with micro-AB connector 45 46Serial Ports Two UART ports 47Ethernet Two RGMII interfaces 48Debug ARM JTAG support 49 50Booting Options 51--------------- 52a) Flexspi boot 53b) SD boot 54 55Memory map for Flexspi flash 56---------------------------- 57Image Flash Offset 58bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000 59fip.bin (bl31 + bl33(u-boot) + 60 header for Secure-boot(secure-boot only)) 0x00100000 61Boot firmware Environment 0x00500000 62DDR PHY Firmware (fip_ddr_all.bin) 0x00800000 63DPAA2 MC Firmware 0x00A00000 64DPAA2 DPL 0x00D00000 65DPAA2 DPC 0x00E00000 66Kernel.itb 0x01000000 67 68Memory map for sd card 69---------------------------- 70Image SD card Offset 71bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008 72fip.bin (bl31 + bl33(u-boot) + 73 header for Secure-boot(secure-boot only)) 0x00800 74Boot firmware Environment 0x02800 75DDR PHY Firmware (fip_ddr_all.bin) 0x04000 76DPAA2 MC Firmware 0x05000 77DPAA2 DPL 0x06800 78DPAA2 DPC 0x07000 79Kernel.itb 0x08000 80 81LX2160AQDS board Overview 82---------------------- 83Various Mezzanine cards and their connection for different SERDES protocols is 84as below: 85 86SERDES1 |CARDS 87----------------------------------------------------------------------- 881 |Mezzanine:X-M4-PCIE-SGMII (29733) 89 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 90 |Connect I/O cable to IO_SLOT1(J110) 91 |Mezzanine:X-M4-PCIE-SGMII (29733) 92 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) 93 |Connect I/O cable to IO_SLOT2(J113) 94------------------------------------------------------------------------ 953 |Mezzanine:X-M11-USXGMII (29828) 96 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 97 |Connect I/O cable to IO_SLOT1(J110) 98 |Mezzanine:X-M4-PCIE-SGMII (29733) 99 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) 100 |Connect I/O cable to IO_SLOT2(J113) 101------------------------------------------------------------------------ 1027 |Mezzanine:X-M11-USXGMII (29828) 103 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 104 |Connect I/O cable to IO_SLOT1(J110) 105 |Mezzanine:X-M4-PCIE-SGMII (29733) 106 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) 107 |Connect I/O cable to IO_SLOT2(J113) 108------------------------------------------------------------------------ 1098 |Mezzanine:X-M12-XFI (29829) 110 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 111 |Connect I/O cable to IO_SLOT1(J110) 112 |Mezzanine:X-M12-XFI (29829) 113 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) 114 |Connect I/O cable to IO_SLOT2(J113) 115------------------------------------------------------------------------ 11613 |Mezzanine:X-M8-100G (29734) 117 |Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) 118 |Connect I/O cable to IO_SLOT1(J110) 119 |Mezzanine:X-M8-100G (29734) 120 |Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT2(J111) 121 |Connect I/O cable to IO_SLOT2(J113) 122------------------------------------------------------------------------ 12315 |Mezzanine:X-M8-100G (29734) 124 |Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) 125 |Connect I/O cable to IO_SLOT1(J110) 126 |Mezzanine:X-M4-PCIE-SGMII (29733) 127 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) 128 |Connect I/O cable to IO_SLOT2(J113) 129------------------------------------------------------------------------ 13017 |Mezzanine:X-M13-25G (32133) 131 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 132 |Connect I/O cable to IO_SLOT1(J110) 133 |Mezzanine:X-M4-PCIE-SGMII (29733) 134 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) 135 |Connect I/O cable to IO_SLOT2(J113) 136------------------------------------------------------------------------ 13719 |Mezzanine:X-M11-USXGMII (29828), X-M13-25G (32133) 138 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 139 |Connect M11 I/O cable to IO_SLOT1(J110), M13 I/O cable to IO_SLOT6(J125) 140 |Mezzanine:X-M7-40G (29738) 141 |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT2 (J111) 142 |Connect I/O cable to IO_SLOT2(J113) 143------------------------------------------------------------------------ 14420 |Mezzanine:X-M7-40G (29738) 145 |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) 146 |Connect I/O cable to IO_SLOT1(J108) 147 |Mezzanine:X-M7-40G (29738) 148 |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT2 (J111) 149 |Connect I/O cable to IO_SLOT2(J113) 150------------------------------------------------------------------------ 151 152 153SERDES2 |CARDS 154----------------------------------------------------------------------- 1552 |Mezzanine:X-M6-PCIE-X8 (29737) * 156 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) 157 |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT4 (J117) 158 |Connect I/O cable to IO_SLOT3(J116) 159------------------------------------------------------------------------ 1603 |Mezzanine:X-M4-PCIE-SGMII (29733) 161 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) 162 |Connect I/O cable to IO_SLOT3(J116) 163 |Mezzanine:X-M4-PCIE-SGMII (29733) 164 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) 165 |Connect I/O cable to IO_SLOT4(J119) 166------------------------------------------------------------------------ 1675 |Mezzanine:X-M4-PCIE-SGMII (29733) 168 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) 169 |Connect I/O cable to IO_SLOT3(J116) 170 |Mezzanine:X-M5-SATA (29687) 171 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) 172 |Connect I/O cable to IO_SLOT4(J119) 173------------------------------------------------------------------------ 17411 |Mezzanine:X-M4-PCIE-SGMII (29733) 175 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) 176 |Connect I/O cable to IO_SLOT7(J127) 177 |Mezzanine:X-M4-PCIE-SGMII (29733) 178 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) 179 |Connect I/O cable to IO_SLOT8(J131) 180------------------------------------------------------------------------ 181 182 183SERDES3 |CARDS 184----------------------------------------------------------------------- 1852 |Mezzanine:X-M6-PCIE-X8 (29737) * 186 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT5 (J120) 187 |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT6 (J123) 188 |Connect I/O cable to IO_SLOT5(J122) 189------------------------------------------------------------------------- 1903 |Mezzanine:X-M4-PCIE-SGMII (29733) 191 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT5 (J120) 192 |Connect I/O cable to IO_SLOT5(J122) 193 |Mezzanine:X-M4-PCIE-SGMII (29733) 194 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT6 (J123) 195 |Connect I/O cable to IO_SLOT6(J125) 196------------------------------------------------------------------------- 197 198LX2162A SoC Overview 199-------------------------------------- 200For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc 201 202LX2162AQDS board Overview 203---------------------- 204DDR Memory 205 One ports of 72-bits (8-bits ECC) DDR4. 206 Each port supports four chip-selects and two DIMM 207 connectors. Data rate upto 2.9 GT/s. 208 209SERDES ports 210 Two serdes controllers (12 lanes) 211 Serdes1: Supports two USXGMII connectors, each connected through 212 Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi 213 IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi 214 CS4223 phy. 215 216 Serdes2: Supports two PCIe x4 (Gen3) and one PCIe x8 (Gen3) connector, 217 four SATA 3.0 connectors 218 219eSDHC 220 eSDHC1: Supports a SD connector for connecting SD cards 221 eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC 222 223Octal SPI (XSPI) 224 Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator 225 for off-board emulation 226 227I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer 228 Serial Ports 229 230USB 3.0 231 One high speed USB 3.0 ports. First USB 3.0 port configured as Host 232 with Type-A connector, second USB 3.0 port configured as OTG with 233 micro-AB connector 234 235Serial Ports Two UART ports 236Ethernet Two RGMII interfaces 237Debug ARM JTAG support 238 239Booting Options 240--------------- 241a) Flexspi boot 242b) SD boot 243c) eMMC boot 244 245Memory map for Flexspi flash 246---------------------------- 247Image Flash Offset 248bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000 249fip.bin (bl31 + bl33(u-boot) + 250 header for Secure-boot(secure-boot only)) 0x00100000 251Boot firmware Environment 0x00500000 252DDR PHY Firmware (fip_ddr_all.bin) 0x00800000 253DPAA2 MC Firmware 0x00A00000 254DPAA2 DPL 0x00D00000 255DPAA2 DPC 0x00E00000 256Kernel.itb 0x01000000 257 258Memory map for sd/eMMC card 259---------------------------- 260Image SD/eMMC card Offset 261bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008 262fip.bin (bl31 + bl33(u-boot) + 263 header for Secure-boot(secure-boot only)) 0x00800 264Boot firmware Environment 0x02800 265DDR PHY Firmware (fip_ddr_all.bin) 0x04000 266DPAA2 MC Firmware 0x05000 267DPAA2 DPL 0x06800 268DPAA2 DPC 0x07000 269Kernel.itb 0x08000 270 271Various Mezzanine cards and their connection for different SERDES protocols is 272as below: 273 274SERDES1 |CARDS 275----------------------------------------------------------------------- 2761 |Mezzanine:X-M4-PCIE-SGMII (29733) 277 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 278 |Connect I/O cable to IO_SLOT1(J110) 279------------------------------------------------------------------------ 2803 |Mezzanine:X-M11-USXGMII (29828) 281 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 282 |Connect I/O cable to IO_SLOT1(J110) 283------------------------------------------------------------------------ 28415 |Mezzanine:X-M8-50G (29734) 285 |Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) 286 |Connect I/O cable to IO_SLOT1(J110) 287------------------------------------------------------------------------ 28817 |Mezzanine:X-M13-25G (32133) 289 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 290 |Connect I/O cable to IO_SLOT1(J110) 291------------------------------------------------------------------------ 29218 |Mezzanine:X-M11-USXGMII (29828), X-M13-25G (32133) 293 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) 294 |Connect M11 I/O cable to IO_SLOT1(J110), M13 I/O cable to IO_SLOT6(J125) 295------------------------------------------------------------------------ 29620 |Mezzanine:X-M7-40G (29738) 297 |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) 298 |Connect I/O cable to IO_SLOT1(J108) 299------------------------------------------------------------------------ 300 301 302SERDES2 |CARDS 303----------------------------------------------------------------------- 3042 |Mezzanine:X-M6-PCIE-X8 (29737) * 305 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) 306 |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT4 (J117) 307 |Connect I/O cable to IO_SLOT3(J116) 308------------------------------------------------------------------------ 3093 |Mezzanine:X-M4-PCIE-SGMII (29733) 310 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) 311 |Connect I/O cable to IO_SLOT3(J116) 312 |Mezzanine:X-M4-PCIE-SGMII (29733) 313 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) 314 |Connect I/O cable to IO_SLOT4(J119) 315------------------------------------------------------------------------ 3165 |Mezzanine:X-M4-PCIE-SGMII (29733) 317 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) 318 |Connect I/O cable to IO_SLOT3(J116) 319 |Mezzanine:X-M5-SATA (29687) 320 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) 321 |Connect I/O cable to IO_SLOT4(J119) 322------------------------------------------------------------------------ 32311 |Mezzanine:X-M4-PCIE-SGMII (29733) 324 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) 325 |Connect I/O cable to IO_SLOT7(J127) 326 |Mezzanine:X-M4-PCIE-SGMII (29733) 327 |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) 328 |Connect I/O cable to IO_SLOT8(J131) 329------------------------------------------------------------------------ 330