1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 */
5
6 #include <common.h>
7
8 #include <fsl_ddr_sdram.h>
9 #include <fsl_ddr_dimm_params.h>
10
11 struct board_specific_parameters {
12 u32 n_ranks;
13 u32 datarate_mhz_high;
14 u32 clk_adjust;
15 u32 cpo;
16 u32 write_data_delay;
17 u32 force_2t;
18 };
19
20 /*
21 * This table contains all valid speeds we want to override with board
22 * specific parameters. datarate_mhz_high values need to be in ascending order
23 * for each n_ranks group.
24 */
25 static const struct board_specific_parameters udimm0[] = {
26 /*
27 * memory controller 0
28 * num| hi| clk| cpo|wrdata|2T
29 * ranks| mhz|adjst| | delay|
30 */
31 {2, 300, 4, 4, 2, 0},
32 {2, 365, 4, 6, 2, 0},
33 {2, 450, 4, 7, 2, 0},
34 {2, 850, 4, 31, 2, 0},
35 {1, 300, 4, 4, 2, 0},
36 {1, 365, 4, 6, 2, 0},
37 {1, 450, 4, 7, 2, 0},
38 {1, 850, 4, 31, 2, 0},
39 {}
40 };
41
fsl_ddr_board_options(memctl_options_t * popts,dimm_params_t * pdimm,unsigned int ctrl_num)42 void fsl_ddr_board_options(memctl_options_t *popts,
43 dimm_params_t *pdimm,
44 unsigned int ctrl_num)
45 {
46 const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
47 unsigned int i;
48 ulong ddr_freq;
49
50 if (ctrl_num != 0) /* we have only one controller */
51 return;
52 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
53 if (pdimm[i].n_ranks)
54 break;
55 }
56 if (i >= CONFIG_DIMM_SLOTS_PER_CTLR) /* no DIMM */
57 return;
58
59 pbsp = udimm0;
60
61 /* Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr
62 * freqency and n_banks specified in board_specific_parameters table.
63 */
64 ddr_freq = get_ddr_freq(0) / 1000000;
65 while (pbsp->datarate_mhz_high) {
66 if (pbsp->n_ranks == pdimm[i].n_ranks) {
67 if (ddr_freq <= pbsp->datarate_mhz_high) {
68 popts->clk_adjust = pbsp->clk_adjust;
69 popts->cpo_override = pbsp->cpo;
70 popts->write_data_delay =
71 pbsp->write_data_delay;
72 popts->twot_en = pbsp->force_2t;
73 goto found;
74 }
75 pbsp_highest = pbsp;
76 }
77 pbsp++;
78 }
79
80 if (pbsp_highest) {
81 printf("Error: board specific timing not found "
82 "for data rate %lu MT/s!\n"
83 "Trying to use the highest speed (%u) parameters\n",
84 ddr_freq, pbsp_highest->datarate_mhz_high);
85 popts->clk_adjust = pbsp_highest->clk_adjust;
86 popts->cpo_override = pbsp_highest->cpo;
87 popts->write_data_delay = pbsp_highest->write_data_delay;
88 popts->twot_en = pbsp_highest->force_2t;
89 } else {
90 panic("DIMM is not supported by this board");
91 }
92
93 found:
94 /*
95 * Factors to consider for half-strength driver enable:
96 * - number of DIMMs installed
97 */
98 popts->half_strength_driver_enable = 0;
99 popts->dqs_config = 0; /* only true DQS signal is used on board */
100 }
101