1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright 2013 Freescale Semiconductor, Inc.
3  */
4 
5 #include <common.h>
6 #include <clock_legacy.h>
7 #include <console.h>
8 #include <env_internal.h>
9 #include <init.h>
10 #include <malloc.h>
11 #include <ns16550.h>
12 #include <nand.h>
13 #include <i2c.h>
14 #include <mmc.h>
15 #include <fsl_esdhc.h>
16 #include <spi_flash.h>
17 #include <asm/global_data.h>
18 #include "../common/spl.h"
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
get_effective_memsize(void)22 phys_size_t get_effective_memsize(void)
23 {
24 	return CONFIG_SYS_L3_SIZE;
25 }
26 
get_board_sys_clk(void)27 unsigned long get_board_sys_clk(void)
28 {
29 	return CONFIG_SYS_CLK_FREQ;
30 }
31 
get_board_ddr_clk(void)32 unsigned long get_board_ddr_clk(void)
33 {
34 	return CONFIG_DDR_CLK_FREQ;
35 }
36 
board_init_f(ulong bootflag)37 void board_init_f(ulong bootflag)
38 {
39 	u32 plat_ratio, sys_clk, ccb_clk;
40 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
41 
42 	/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
43 	memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
44 
45 	/* Update GD pointer */
46 	gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
47 
48 	console_init_f();
49 
50 	/* initialize selected port with appropriate baud rate */
51 	sys_clk = get_board_sys_clk();
52 	plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
53 	ccb_clk = sys_clk * plat_ratio / 2;
54 
55 	ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
56 		     ccb_clk / 16 / CONFIG_BAUDRATE);
57 
58 #if defined(CONFIG_SPL_MMC_BOOT)
59 	puts("\nSD boot...\n");
60 #elif defined(CONFIG_SPL_SPI_BOOT)
61 	puts("\nSPI boot...\n");
62 #elif defined(CONFIG_SPL_NAND_BOOT)
63 	puts("\nNAND boot...\n");
64 #endif
65 
66 	relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
67 }
68 
board_init_r(gd_t * gd,ulong dest_addr)69 void board_init_r(gd_t *gd, ulong dest_addr)
70 {
71 	struct bd_info *bd;
72 
73 	bd = (struct bd_info *)(gd + sizeof(gd_t));
74 	memset(bd, 0, sizeof(struct bd_info));
75 	gd->bd = bd;
76 
77 	arch_cpu_init();
78 	get_clocks();
79 	mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
80 			CONFIG_SPL_RELOC_MALLOC_SIZE);
81 	gd->flags |= GD_FLG_FULL_MALLOC_INIT;
82 
83 #ifdef CONFIG_SPL_NAND_BOOT
84 	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
85 			    (uchar *)SPL_ENV_ADDR);
86 #endif
87 #ifdef CONFIG_SPL_MMC_BOOT
88 	mmc_initialize(bd);
89 	mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
90 			   (uchar *)SPL_ENV_ADDR);
91 #endif
92 #ifdef CONFIG_SPL_SPI_BOOT
93 	fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
94 			       (uchar *)SPL_ENV_ADDR);
95 #endif
96 
97 	gd->env_addr  = (ulong)(SPL_ENV_ADDR);
98 	gd->env_valid = ENV_VALID;
99 
100 	i2c_init_all();
101 
102 	dram_init();
103 
104 #ifdef CONFIG_SPL_MMC_BOOT
105 	mmc_boot();
106 #elif defined(CONFIG_SPL_SPI_BOOT)
107 	fsl_spi_boot();
108 #elif defined(CONFIG_SPL_NAND_BOOT)
109 	nand_boot();
110 #endif
111 }
112