1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright 2016 Google Inc.
4 */
5
6#include "variant_ec.h"
7#include "variant_gpio.h"
8#include <acpi/acpi_table.h>
9#include <asm/acpi/global_nvs.h>
10
11DefinitionBlock(
12	"dsdt.aml",
13	"DSDT",
14	0x02,		// DSDT revision: ACPI v2.0 and up
15	OEM_ID,
16	OEM_TABLE_ID,
17	0x20110725	// OEM revision
18)
19{
20	/* global NVS and variables */
21	#include <asm/arch/acpi/globalnvs.asl>
22
23	/* CPU */
24	#include <asm/acpi/cpu.asl>
25
26	Scope (\_SB) {
27		Device (PCI0)
28		{
29			#include <asm/arch/acpi/northbridge.asl>
30			#include <asm/arch/acpi/southbridge.asl>
31			#include <asm/arch/acpi/pch_hda.asl>
32		}
33	}
34
35	/* Chrome OS specific */
36	#include <asm/acpi/chromeos.asl>
37
38	/* Chipset specific sleep states */
39	#include <asm/acpi/sleepstates.asl>
40
41	/* Chrome OS Embedded Controller */
42	Scope (\_SB.PCI0.LPCB)
43	{
44		/* ACPI code for EC SuperIO functions */
45		#include <asm/acpi/cros_ec/superio.asl>
46		/* ACPI code for EC functions */
47		#include <asm/acpi/cros_ec/ec.asl>
48	}
49
50	/* Dynamic Platform Thermal Framework */
51	Scope (\_SB)
52	{
53		/* Per board variant specific definitions. */
54		#include "variant_dptf.asl"
55		/* Include soc specific DPTF changes */
56		#include <asm/arch/acpi/dptf.asl>
57		/* Include common dptf ASL files */
58		#include <asm/acpi/dptf/dptf.asl>
59	}
60}
61