1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2018 Google
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <init.h>
9 
10 #ifdef CONFIG_SPL_BUILD
11 /* provided to defeat compiler optimisation in board_init_f() */
gru_dummy_function(int i)12 void gru_dummy_function(int i)
13 {
14 }
15 
board_early_init_f(void)16 int board_early_init_f(void)
17 {
18 # ifdef CONFIG_TARGET_CHROMEBOOK_BOB
19 	int sum, i;
20 
21 	/*
22 	 * Add a delay and ensure that the compiler does not optimise this out.
23 	 * This is needed since the power rails tail a while to turn on, and
24 	 * we get garbage serial output otherwise.
25 	 */
26 	sum = 0;
27 	for (i = 0; i < 150000; i++)
28 		sum += i;
29 	gru_dummy_function(sum);
30 #endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
31 
32 	return 0;
33 }
34 #endif
35 
36 #ifndef CONFIG_SPL_BUILD
board_early_init_r(void)37 int board_early_init_r(void)
38 {
39 	struct udevice *clk;
40 	int ret;
41 
42 	/*
43 	 * This init is done in SPL, but when chain-loading U-Boot SPL will
44 	 * have been skipped. Allow the clock driver to check if it needs
45 	 * setting up.
46 	 */
47 	ret = uclass_get_device_by_driver(UCLASS_CLK,
48 					  DM_DRIVER_GET(clk_rk3399), &clk);
49 	if (ret) {
50 		debug("%s: CLK init failed: %d\n", __func__, ret);
51 		return ret;
52 	}
53 
54 	return 0;
55 }
56 #endif
57