1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <errno.h>
9 #include <init.h>
10 #include <pci.h>
11 #include <smsc_sio1007.h>
12 #include <asm/ibmpc.h>
13 #include <asm/lpc_common.h>
14 #include <asm/pci.h>
15 #include <asm/arch/pch.h>
16
17 #define SIO1007_RUNTIME_IOPORT 0x180
18
board_early_init_f(void)19 int board_early_init_f(void)
20 {
21 struct udevice *pch;
22 int ret;
23
24 ret = uclass_first_device(UCLASS_PCH, &pch);
25 if (ret)
26 return ret;
27 if (!pch)
28 return -ENODEV;
29
30 /* Initialize LPC interface to turn on superio chipset decode range */
31 dm_pci_write_config16(pch, LPC_IO_DEC, COMA_DEC_RANGE | COMB_DEC_RANGE);
32 dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | COMA_LPC_EN);
33 dm_pci_write_config32(pch, LPC_GEN1_DEC, GEN_DEC_RANGE_256B |
34 (SIO1007_IOPORT3 & 0xff00) | GEN_DEC_RANGE_EN);
35 dm_pci_write_config32(pch, LPC_GEN2_DEC, GEN_DEC_RANGE_16B |
36 SIO1007_RUNTIME_IOPORT | GEN_DEC_RANGE_EN);
37
38 /* Enable legacy serial port at 0x3f8 */
39 sio1007_enable_serial(SIO1007_IOPORT3, 0, UART0_BASE, UART0_IRQ);
40
41 /* Enable SIO1007 runtime I/O port at 0x180 */
42 sio1007_enable_runtime(SIO1007_IOPORT3, SIO1007_RUNTIME_IOPORT);
43
44 /*
45 * On Cougar Canyon 2 board, the RS232 transiver connected to serial
46 * port 0 (0x3f8) is controlled by a GPIO pin (GPIO10) on the SIO1007.
47 * Set the pin value to 1 to enable the RS232 transiver.
48 */
49 sio1007_gpio_config(SIO1007_IOPORT3, 0, GPIO_DIR_OUTPUT,
50 GPIO_POL_NO_INVERT, GPIO_TYPE_PUSH_PULL);
51 sio1007_gpio_set_value(SIO1007_RUNTIME_IOPORT, 0, 1);
52
53 return 0;
54 }
55