1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2017 DENX Software Engineering
4  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <fdt_support.h>
10 #include <init.h>
11 #include <log.h>
12 #include <asm/global_data.h>
13 #include <asm/io.h>
14 #include <asm/arch/clock.h>
15 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/iomux.h>
17 #include <asm/arch/mx6-pins.h>
18 #include <asm/arch/mx6-ddr.h>
19 #include <asm/arch/sys_proto.h>
20 #include <env.h>
21 #include <errno.h>
22 #include <asm/gpio.h>
23 #include <malloc.h>
24 #include <asm/mach-imx/iomux-v3.h>
25 #include <asm/mach-imx/boot_mode.h>
26 #include <miiphy.h>
27 #include <netdev.h>
28 #include <i2c.h>
29 #include <linux/delay.h>
30 
31 #include <dm/platform_data/serial_mxc.h>
32 #include <dm/platdata.h>
33 
34 #include "common.h"
35 
36 DECLARE_GLOBAL_DATA_PTR;
37 
38 static bool hw_ids_valid;
39 static bool sw_ids_valid;
40 static u32 cpu_id;
41 static u32 unit_id;
42 
43 const char *gpio_table_sw_names[] = {
44 	"GPIO2_4", "GPIO2_5", "GPIO2_6", "GPIO2_7"
45 };
46 
47 const char *gpio_table_sw_ids_names[] = {
48 	"sw0", "sw1", "sw2", "sw3"
49 };
50 
51 const char *gpio_table_hw_names[] = {
52 	"GPIO6_7", "GPIO6_9", "GPIO6_10", "GPIO6_11",
53 	"GPIO4_7", "GPIO4_11", "GPIO4_13", "GPIO4_15"
54 };
55 
56 const char *gpio_table_hw_ids_names[] = {
57 	"hw0", "hw1", "hw2", "hw3", "hw4", "hw5", "hw6", "hw7"
58 };
59 
get_board_id(const char ** pin_names,const char ** ids_names,int size,bool * valid,u32 * id)60 static int get_board_id(const char **pin_names, const char **ids_names,
61 			int size, bool *valid, u32 *id)
62 {
63 	struct gpio_desc desc;
64 	int i, ret, val;
65 
66 	*valid = false;
67 
68 	for (i = 0; i < size; i++) {
69 		memset(&desc, 0, sizeof(desc));
70 
71 		ret = dm_gpio_lookup_name(pin_names[i], &desc);
72 		if (ret) {
73 			printf("Can't lookup request SWx gpios\n");
74 			return ret;
75 		}
76 
77 		ret = dm_gpio_request(&desc, ids_names[i]);
78 		if (ret) {
79 			printf("Can't lookup request SWx gpios\n");
80 			return ret;
81 		}
82 
83 		dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN);
84 
85 		val = dm_gpio_get_value(&desc);
86 		if (val < 0) {
87 			printf("Can't get SW%d ID\n", i);
88 			*id = 0;
89 			return val;
90 		}
91 		*id |= val << i;
92 	}
93 	*valid = true;
94 
95 	return 0;
96 }
97 
dram_init(void)98 int dram_init(void)
99 {
100 	gd->ram_size = imx_ddr_size();
101 
102 	return 0;
103 }
104 
105 iomux_v3_cfg_t const misc_pads[] = {
106 	/* Prod ID GPIO pins */
107 	MX6_PAD_NANDF_D4__GPIO2_IO04    | MUX_PAD_CTRL(NO_PAD_CTRL),
108 	MX6_PAD_NANDF_D5__GPIO2_IO05    | MUX_PAD_CTRL(NO_PAD_CTRL),
109 	MX6_PAD_NANDF_D6__GPIO2_IO06    | MUX_PAD_CTRL(NO_PAD_CTRL),
110 	MX6_PAD_NANDF_D7__GPIO2_IO07    | MUX_PAD_CTRL(NO_PAD_CTRL),
111 
112 	/* HW revision GPIO pins */
113 	MX6_PAD_NANDF_CLE__GPIO6_IO07   | MUX_PAD_CTRL(NO_PAD_CTRL),
114 	MX6_PAD_NANDF_WP_B__GPIO6_IO09  | MUX_PAD_CTRL(NO_PAD_CTRL),
115 	MX6_PAD_NANDF_RB0__GPIO6_IO10   | MUX_PAD_CTRL(NO_PAD_CTRL),
116 	MX6_PAD_NANDF_CS0__GPIO6_IO11   | MUX_PAD_CTRL(NO_PAD_CTRL),
117 	MX6_PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
118 	MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
119 	MX6_PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL),
120 	MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
121 
122 	/* XTALOSC */
123 	MX6_PAD_GPIO_3__XTALOSC_REF_CLK_24M | MUX_PAD_CTRL(NO_PAD_CTRL),
124 
125 	/* Emergency recovery pin */
126 	MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
127 };
128 
129 /*
130  * Do not overwrite the console
131  * Always use serial for U-Boot console
132  */
overwrite_console(void)133 int overwrite_console(void)
134 {
135 	return 1;
136 }
137 
138 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * blob,struct bd_info * bd)139 int ft_board_setup(void *blob, struct bd_info *bd)
140 {
141 	fdt_fixup_ethernet(blob);
142 	return 0;
143 }
144 #endif
145 
board_phy_config(struct phy_device * phydev)146 int board_phy_config(struct phy_device *phydev)
147 {
148 	/* display5 due to PCB routing can only work with 100 Mbps */
149 	phydev->advertising &= ~(ADVERTISED_1000baseX_Half |
150 				 ADVERTISED_1000baseX_Full |
151 				 SUPPORTED_1000baseT_Half |
152 				 SUPPORTED_1000baseT_Full);
153 
154 	if (phydev->drv->config)
155 		return phydev->drv->config(phydev);
156 
157 	return 0;
158 }
159 
board_init(void)160 int board_init(void)
161 {
162 	struct gpio_desc phy_int_gbe, spi2_wp;
163 	int ret;
164 
165 	debug("board init\n");
166 	/* address of boot parameters */
167 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
168 
169 	/* Setup misc (application specific) stuff */
170 	SETUP_IOMUX_PADS(misc_pads);
171 
172 	get_board_id(gpio_table_sw_names, &gpio_table_sw_ids_names[0],
173 		     ARRAY_SIZE(gpio_table_sw_names), &sw_ids_valid, &unit_id);
174 	debug("SWx unit_id 0x%x\n", unit_id);
175 
176 	get_board_id(gpio_table_hw_names, &gpio_table_hw_ids_names[0],
177 		     ARRAY_SIZE(gpio_table_hw_names), &hw_ids_valid, &cpu_id);
178 	debug("HWx cpu_id 0x%x\n", cpu_id);
179 
180 	if (hw_ids_valid && sw_ids_valid)
181 		printf("ID:    unit type 0x%x rev 0x%x\n", unit_id, cpu_id);
182 
183 	udelay(25);
184 
185 	/* Setup low level FEC (ETH) */
186 	ret = dm_gpio_lookup_name("GPIO1_28", &phy_int_gbe);
187 	if (ret) {
188 		printf("Cannot get GPIO1_28\n");
189 	} else {
190 		ret = dm_gpio_request(&phy_int_gbe, "INT_GBE");
191 		if (!ret)
192 			dm_gpio_set_dir_flags(&phy_int_gbe, GPIOD_IS_IN);
193 	}
194 
195 	iomuxc_set_rgmii_io_voltage(DDR_SEL_1P5V_IO);
196 	enable_fec_anatop_clock(0, ENET_125MHZ);
197 
198 	/* Setup #WP for SPI-NOR memory */
199 	ret = dm_gpio_lookup_name("GPIO7_0", &spi2_wp);
200 	if (ret) {
201 		printf("Cannot get GPIO7_0\n");
202 	} else {
203 		ret = dm_gpio_request(&spi2_wp, "spi2_#wp");
204 		if (!ret)
205 			dm_gpio_set_dir_flags(&spi2_wp, GPIOD_IS_OUT |
206 					      GPIOD_IS_OUT_ACTIVE);
207 	}
208 
209 	return 0;
210 }
211 
212 #ifdef CONFIG_CMD_BMODE
213 static const struct boot_mode board_boot_modes[] = {
214 	/* eMMC, USDHC-4, 8-bit bus width */
215 	/* SPI-NOR, ECSPI-2 SS0, 3-bytes addressing */
216 	{"emmc",    MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)},
217 	{"spinor",  MAKE_CFGVAL(0x30, 0x00, 0x00, 0x09)},
218 	{NULL,	0},
219 };
220 
setup_boot_modes(void)221 static void setup_boot_modes(void)
222 {
223 	add_board_boot_modes(board_boot_modes);
224 }
225 #else
setup_boot_modes(void)226 static inline void setup_boot_modes(void) {}
227 #endif
228 
misc_init_r(void)229 int misc_init_r(void)
230 {
231 	struct gpio_desc em_pad;
232 	int ret;
233 
234 	setup_boot_modes();
235 
236 	ret = dm_gpio_lookup_name("GPIO3_29", &em_pad);
237 	if (ret) {
238 		printf("Can't find emergency PAD gpio\n");
239 		return ret;
240 	}
241 
242 	ret = dm_gpio_request(&em_pad, "Emergency_PAD");
243 	if (ret) {
244 		printf("Can't request emergency PAD gpio\n");
245 		return ret;
246 	}
247 
248 	dm_gpio_set_dir_flags(&em_pad, GPIOD_IS_IN);
249 
250 	return 0;
251 }
252