1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C)Copyright 2016 Rockchip Electronics Co., Ltd
4 * Authors: Andy Yan <andy.yan@rock-chips.com>
5 */
6
7 #include <common.h>
8 #include <init.h>
9 #include <syscon.h>
10 #include <asm/global_data.h>
11 #include <asm/io.h>
12 #include <asm/arch-rockchip/clock.h>
13 #include <asm/arch-rockchip/grf_rv1108.h>
14 #include <asm/arch-rockchip/hardware.h>
15
16 DECLARE_GLOBAL_DATA_PTR;
17
board_early_init_f(void)18 int board_early_init_f(void)
19 {
20 struct rv1108_grf *grf;
21 enum {
22 GPIO3C3_SHIFT = 6,
23 GPIO3C3_MASK = 3 << GPIO3C3_SHIFT,
24
25 GPIO3C2_SHIFT = 4,
26 GPIO3C2_MASK = 3 << GPIO3C2_SHIFT,
27
28 GPIO2D2_SHIFT = 4,
29 GPIO2D2_MASK = 3 << GPIO2D2_SHIFT,
30 GPIO2D2_GPIO = 0,
31 GPIO2D2_UART2_SOUT_M0,
32
33 GPIO2D1_SHIFT = 2,
34 GPIO2D1_MASK = 3 << GPIO2D1_SHIFT,
35 GPIO2D1_GPIO = 0,
36 GPIO2D1_UART2_SIN_M0,
37 };
38
39 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
40
41 /*evb board use UART2 m0 for debug*/
42 rk_clrsetreg(&grf->gpio2d_iomux,
43 GPIO2D2_MASK | GPIO2D1_MASK,
44 GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
45 GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
46 rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK);
47
48 return 0;
49 }
50
dram_init(void)51 int dram_init(void)
52 {
53 gd->ram_size = 0x8000000;
54
55 return 0;
56 }
57