1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2004-2008
4 * Texas Instruments, <www.ti.com>
5 *
6 * Author :
7 * Sunil Kumar <sunilsaini05@gmail.com>
8 * Shashi Ranjan <shashiranjanmca05@gmail.com>
9 *
10 * (C) Copyright 2009
11 * Frederik Kriewitz <frederik@kriewitz.eu>
12 *
13 * Derived from Beagle Board and 3430 SDP code by
14 * Richard Woodruff <r-woodruff2@ti.com>
15 * Syed Mohammed Khasim <khasim@ti.com>
16 *
17 */
18 #include <common.h>
19 #include <dm.h>
20 #include <env.h>
21 #include <init.h>
22 #include <malloc.h>
23 #include <ns16550.h>
24 #include <twl4030.h>
25 #include <asm/global_data.h>
26 #include <asm/io.h>
27 #include <asm/arch/mmc_host_def.h>
28 #include <asm/arch/mux.h>
29 #include <asm/arch/sys_proto.h>
30 #include <asm/arch/mem.h>
31 #include <asm/mach-types.h>
32 #include "devkit8000.h"
33 #include <asm/gpio.h>
34 #ifdef CONFIG_DRIVER_DM9000
35 #include <net.h>
36 #include <netdev.h>
37 #endif
38
39 DECLARE_GLOBAL_DATA_PTR;
40
41 static u32 gpmc_net_config[GPMC_MAX_REG] = {
42 NET_GPMC_CONFIG1,
43 NET_GPMC_CONFIG2,
44 NET_GPMC_CONFIG3,
45 NET_GPMC_CONFIG4,
46 NET_GPMC_CONFIG5,
47 NET_GPMC_CONFIG6,
48 0
49 };
50
51 static const struct ns16550_plat devkit8000_serial = {
52 .base = OMAP34XX_UART3,
53 .reg_shift = 2,
54 .clock = V_NS16550_CLK,
55 .fcr = UART_FCR_DEFVAL,
56 };
57
58 U_BOOT_DRVINFO(devkit8000_uart) = {
59 "ns16550_serial",
60 &devkit8000_serial
61 };
62
63 /*
64 * Routine: board_init
65 * Description: Early hardware init.
66 */
board_init(void)67 int board_init(void)
68 {
69 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
70 /* board id for Linux */
71 gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000;
72 /* boot param addr */
73 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
74
75 return 0;
76 }
77
78 /* Configure GPMC registers for DM9000 */
gpmc_dm9000_config(void)79 static void gpmc_dm9000_config(void)
80 {
81 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
82 CONFIG_DM9000_BASE, GPMC_SIZE_16M);
83 }
84
85 /*
86 * Routine: misc_init_r
87 * Description: Configure board specific parts
88 */
misc_init_r(void)89 int misc_init_r(void)
90 {
91 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
92 #ifdef CONFIG_DRIVER_DM9000
93 uchar enetaddr[6];
94 u32 die_id_0;
95 #endif
96
97 twl4030_power_init();
98 #ifdef CONFIG_TWL4030_LED
99 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
100 #endif
101
102 #ifdef CONFIG_DRIVER_DM9000
103 /* Configure GPMC registers for DM9000 */
104 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
105 CONFIG_DM9000_BASE, GPMC_SIZE_16M);
106
107 /* Use OMAP DIE_ID as MAC address */
108 if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
109 printf("ethaddr not set, using Die ID\n");
110 die_id_0 = readl(&id_base->die_id_0);
111 enetaddr[0] = 0x02; /* locally administered */
112 enetaddr[1] = readl(&id_base->die_id_1) & 0xff;
113 enetaddr[2] = (die_id_0 & 0xff000000) >> 24;
114 enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16;
115 enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8;
116 enetaddr[5] = (die_id_0 & 0x000000ff);
117 eth_env_set_enetaddr("ethaddr", enetaddr);
118 }
119 #endif
120
121 omap_die_id_display();
122
123 return 0;
124 }
125
126 /*
127 * Routine: set_muxconf_regs
128 * Description: Setting up the configuration Mux registers specific to the
129 * hardware. Many pins need to be moved from protect to primary
130 * mode.
131 */
set_muxconf_regs(void)132 void set_muxconf_regs(void)
133 {
134 MUX_DEVKIT8000();
135 }
136
137 #if defined(CONFIG_MMC)
board_mmc_init(struct bd_info * bis)138 int board_mmc_init(struct bd_info *bis)
139 {
140 return omap_mmc_init(0, 0, 0, -1, -1);
141 }
142 #endif
143
144 #if defined(CONFIG_MMC)
board_mmc_power_init(void)145 void board_mmc_power_init(void)
146 {
147 twl4030_power_mmc_init(0);
148 }
149 #endif
150
151 #if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
152 /*
153 * Routine: board_eth_init
154 * Description: Setting up the Ethernet hardware.
155 */
board_eth_init(struct bd_info * bis)156 int board_eth_init(struct bd_info *bis)
157 {
158 return dm9000_initialize(bis);
159 }
160 #endif
161
162 #ifdef CONFIG_SPL_OS_BOOT
163 /*
164 * Do board specific preparation before SPL
165 * Linux boot
166 */
spl_board_prepare_for_linux(void)167 void spl_board_prepare_for_linux(void)
168 {
169 gpmc_dm9000_config();
170 }
171
172 /*
173 * devkit8000 specific implementation of spl_start_uboot()
174 *
175 * RETURN
176 * 0 if the button is not pressed
177 * 1 if the button is pressed
178 */
spl_start_uboot(void)179 int spl_start_uboot(void)
180 {
181 int val = 0;
182 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
183 gpio_direction_input(SPL_OS_BOOT_KEY);
184 val = gpio_get_value(SPL_OS_BOOT_KEY);
185 gpio_free(SPL_OS_BOOT_KEY);
186 }
187 return !val;
188 }
189 #endif
190
191 /*
192 * Routine: get_board_mem_timings
193 * Description: If we use SPL then there is no x-loader nor config header
194 * so we have to setup the DDR timings ourself on the first bank. This
195 * provides the timing values back to the function that configures
196 * the memory. We have either one or two banks of 128MB DDR.
197 */
get_board_mem_timings(struct board_sdrc_timings * timings)198 void get_board_mem_timings(struct board_sdrc_timings *timings)
199 {
200 /* General SDRC config */
201 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
202 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
203
204 /* AC timings */
205 timings->ctrla = MICRON_V_ACTIMA_165;
206 timings->ctrlb = MICRON_V_ACTIMB_165;
207
208 timings->mr = MICRON_V_MR_165;
209 }
210