1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2014, 2015 O.S. Systems Software LTDA.
4  * Copyright (C) 2014 Kynetics LLC.
5  * Copyright (C) 2014 Revolution Robotics, Inc.
6  *
7  * Author: Otavio Salvador <otavio@ossystems.com.br>
8  */
9 
10 #include <init.h>
11 #include <asm/arch/clock.h>
12 #include <asm/arch/iomux.h>
13 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/mx6-pins.h>
15 #include <asm/arch/sys_proto.h>
16 #include <asm/global_data.h>
17 #include <asm/gpio.h>
18 #include <asm/mach-imx/iomux-v3.h>
19 #include <asm/mach-imx/mxc_i2c.h>
20 #include <asm/io.h>
21 #include <linux/sizes.h>
22 #include <common.h>
23 #include <watchdog.h>
24 #include <fsl_esdhc_imx.h>
25 #include <i2c.h>
26 #include <mmc.h>
27 #include <usb.h>
28 #include <power/pmic.h>
29 #include <power/max77696_pmic.h>
30 
31 DECLARE_GLOBAL_DATA_PTR;
32 
33 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
34 	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
35 	PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
36 	PAD_CTL_LVE)
37 
38 #define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
39 	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
40 	PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
41 	PAD_CTL_LVE)
42 
43 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
44 		      PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |	\
45 		      PAD_CTL_DSE_40ohm | PAD_CTL_HYS |		\
46 		      PAD_CTL_ODE | PAD_CTL_SRE_FAST)
47 
dram_init(void)48 int dram_init(void)
49 {
50 	gd->ram_size = imx_ddr_size();
51 
52 	return 0;
53 }
54 
setup_iomux_uart(void)55 static void setup_iomux_uart(void)
56 {
57 	static iomux_v3_cfg_t const uart1_pads[] = {
58 		MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
59 		MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
60 	};
61 
62 	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
63 }
64 
65 static struct fsl_esdhc_cfg usdhc_cfg[1] = {
66 	{USDHC2_BASE_ADDR, 0, 0, 0, 1},
67 };
68 
board_mmc_getcd(struct mmc * mmc)69 int board_mmc_getcd(struct mmc *mmc)
70 {
71 	return 1;	/* Assume boot SD always present */
72 }
73 
board_mmc_init(struct bd_info * bis)74 int board_mmc_init(struct bd_info *bis)
75 {
76 	static iomux_v3_cfg_t const usdhc2_pads[] = {
77 		MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
78 		MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
79 		MX6_PAD_SD2_RST__USDHC2_RST | MUX_PAD_CTRL(USDHC_PAD_CTRL),
80 		MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
81 		MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
82 		MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
83 		MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
84 		MX6_PAD_SD2_DAT4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
85 		MX6_PAD_SD2_DAT5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
86 		MX6_PAD_SD2_DAT6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
87 		MX6_PAD_SD2_DAT7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
88 	};
89 
90 	imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
91 
92 	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
93 	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
94 }
95 
board_usb_phy_mode(int port)96 int board_usb_phy_mode(int port)
97 {
98 	return USB_INIT_DEVICE;
99 }
100 
101 /* I2C1 for PMIC */
102 #define I2C_PMIC	0
103 #define PC	MUX_PAD_CTRL(I2C_PAD_CTRL)
104 struct i2c_pads_info i2c_pad_info1 = {
105 	.sda = {
106 		.i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC,
107 		.gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC,
108 		.gp = IMX_GPIO_NR(3, 13),
109 	},
110 	.scl = {
111 		.i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC,
112 		.gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC,
113 		.gp = IMX_GPIO_NR(3, 12),
114 	},
115 };
116 
power_init_board(void)117 int power_init_board(void)
118 {
119 	struct pmic *p;
120 	int ret;
121 	unsigned int reg;
122 
123 	ret = power_max77696_init(I2C_PMIC);
124 	if (ret)
125 		return ret;
126 
127 	p = pmic_get("MAX77696");
128 	if (!p)
129 		return -EINVAL;
130 
131 	ret = pmic_reg_read(p, CID, &reg);
132 	if (ret)
133 		return ret;
134 
135 	printf("PMIC:  MAX77696 detected, rev=0x%x\n", reg);
136 
137 	return pmic_probe(p);
138 }
139 
board_early_init_f(void)140 int board_early_init_f(void)
141 {
142 	setup_iomux_uart();
143 	return 0;
144 }
145 
board_init(void)146 int board_init(void)
147 {
148 	/* address of boot parameters */
149 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
150 
151 	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
152 
153 	return 0;
154 }
155 
board_late_init(void)156 int board_late_init(void)
157 {
158 #ifdef CONFIG_HW_WATCHDOG
159 	hw_watchdog_init();
160 #endif
161 
162 	return 0;
163 }
164 
checkboard(void)165 int checkboard(void)
166 {
167 	puts("Board: WaRP Board\n");
168 
169 	return 0;
170 }
171