1Binding for TI CDCE913/925/937/949 programmable I2C clock synthesizers.
2
3Reference
4This binding uses the common clock binding[1].
5
6[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
7[2] http://www.ti.com/product/cdce913
8[3] http://www.ti.com/product/cdce925
9[4] http://www.ti.com/product/cdce937
10[5] http://www.ti.com/product/cdce949
11
12The driver provides clock sources for each output Y1 through Y5.
13
14Required properties:
15 - compatible: Shall be one of the following:
16	- "ti,cdce913": 1-PLL, 3 Outputs
17	- "ti,cdce925": 2-PLL, 5 Outputs
18	- "ti,cdce937": 3-PLL, 7 Outputs
19	- "ti,cdce949": 4-PLL, 9 Outputs
20 - reg: I2C device address.
21 - clocks: Points to a fixed parent clock that provides the input frequency.
22 - #clock-cells: From common clock bindings: Shall be 1.
23
24Optional properties:
25 - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a
26                 board, or to compensate for external influences.
27
28For all PLL1, PLL2, ... an optional child node can be used to specify spread
29spectrum clocking parameters for a board.
30  - spread-spectrum: SSC mode as defined in the data sheet.
31  - spread-spectrum-center: Use "centered" mode instead of "max" mode. When
32    present, the clock runs at the requested frequency on average. Otherwise
33    the requested frequency is the maximum value of the SCC range.
34
35
36Example:
37
38	clockgen: cdce925pw@64 {
39		compatible = "cdce925";
40		reg = <0x64>;
41		clocks = <&xtal_27Mhz>;
42		#clock-cells = <1>;
43		xtal-load-pf = <5>;
44		/* PLL options to get SSC 1% centered */
45		PLL2 {
46			spread-spectrum = <4>;
47			spread-spectrum-center;
48		};
49	};
50