1The device node for Mediatek USB3 DRD controller
2
3Required properties:
4 - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
5	soc-model is the name of SoC, such as mt8512 etc,
6	when using "mediatek,mtu3" compatible string, you need SoC specific
7	ones in addition, one of:
8	- "mediatek,mt8512-mtu3"
9 - reg : specifies physical base address and size of the registers
10 - reg-names: should be
11	- "ippc" : IP Port Control
12 - power-domains : a phandle to USB power domain node to control USB's MTCMOS
13 - clocks : a list of phandle + clock-specifier pairs, one for each
14	entry in clock-names
15 - clock-names : must contain "sys_ck" for clock of controller,
16	the following clocks are optional:
17	"ref_ck", "mcu_ck", "dma_ck" and "xhci_ck";
18 - phys : list of all the USB PHYs on this HCD
19 - #address-cells, #size-cells : used for sub-nodes with 'reg' property
20 - ranges : allows valid 1:1 translation between child's address space and
21	parent's address space
22
23Optional properties:
24 - vusb33-supply : regulator of USB AVDD3.3v
25 - vbus-supply : regulator of VBUS 5v, needed when supports host mode.
26
27Sub-nodes:
28Required properties:
29 - compatible : should be "mediatek,ssusb"
30 - reg : specifies physical base address and size of the registers
31 - reg-names: should be
32	- "mac" : SSUSB MAC, include xHCI and device
33 - interrupts : interrupt used by xHCI or device
34 - dr_mode : should be one of "host" or "peripheral",
35	see : usb/generic.txt
36
37Optional properties:
38 - pinctrl-names : a pinctrl state named "default" is optional
39 - pinctrl-0 : pin control group
40	See: pinctrl/pinctrl-bindings.txt
41
42 - device mode:
43   - maximum-speed : valid arguments are "full-speed", "high-speed",
44	"super-speed" and "super-speed-plus",
45	see: usb/generic.txt
46   - mediatek,force-vbus : force vbus as valid by SW
47
48 - host mode (dr_mode is "host"):
49   - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
50	bit1 for u3port1, ... etc;
51
52Example:
53usb3: usb@11213e00 {
54	compatible = "mediatek,mt8512-mtu3", "mediatek,mtu3";
55	reg = <0x11213e00 0x0100>;
56	reg-names = "ippc";
57	phys = <&u2port0 PHY_TYPE_USB2>, <&u2port1 PHY_TYPE_USB2>;
58	power-domains = <&scpsys MT8512_POWER_DOMAIN_USB>;
59	clocks = <&infracfg CLK_INFRA_USB_SYS>,
60		 <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>,
61		 <&infracfg CLK_INFRA_ICUSB>;
62	clock-names = "sys_ck", "ref_ck", "mcu_ck";
63	vusb33-supply = <reg_3p3v>;
64	vbus-supply = <&usb_p0_vbus>;
65	#address-cells = <1>;
66	#size-cells = <1>;
67	ranges;
68	status = "disabled";
69
70	ssusb: usb@11210000 {
71		compatible = "mediatek,ssusb";
72		reg = <0x11210000 0x3e00>;
73		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_LOW>;
74		reg-names = "mac";
75		dr_mode = "peripheral";
76		maximum-speed = "high-speed";
77		status = "disabled";
78	};
79};
80