1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2018 NXP
4 * Peng Fan <peng.fan@nxp.com>
5 */
6
7 #include <common.h>
8 #include <clk-uclass.h>
9 #include <dm.h>
10 #include <log.h>
11 #include <malloc.h>
12 #include <asm/arch/sci/sci.h>
13 #include <asm/arch/clock.h>
14 #include <dt-bindings/clock/imx8qxp-clock.h>
15 #include <dt-bindings/soc/imx_rsrc.h>
16 #include <misc.h>
17
18 #include "clk-imx8.h"
19
imx8_clk_get_rate(struct clk * clk)20 __weak ulong imx8_clk_get_rate(struct clk *clk)
21 {
22 return 0;
23 }
24
imx8_clk_set_rate(struct clk * clk,unsigned long rate)25 __weak ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate)
26 {
27 return 0;
28 }
29
__imx8_clk_enable(struct clk * clk,bool enable)30 __weak int __imx8_clk_enable(struct clk *clk, bool enable)
31 {
32 return -ENOTSUPP;
33 }
34
imx8_clk_disable(struct clk * clk)35 static int imx8_clk_disable(struct clk *clk)
36 {
37 return __imx8_clk_enable(clk, 0);
38 }
39
imx8_clk_enable(struct clk * clk)40 static int imx8_clk_enable(struct clk *clk)
41 {
42 return __imx8_clk_enable(clk, 1);
43 }
44
45 #if CONFIG_IS_ENABLED(CMD_CLK)
soc_clk_dump(void)46 int soc_clk_dump(void)
47 {
48 struct udevice *dev;
49 struct clk clk;
50 unsigned long rate;
51 int i, ret;
52
53 ret = uclass_get_device_by_driver(UCLASS_CLK,
54 DM_DRIVER_GET(imx8_clk), &dev);
55 if (ret)
56 return ret;
57
58 printf("Clk\t\tHz\n");
59
60 for (i = 0; i < num_clks; i++) {
61 clk.id = imx8_clk_names[i].id;
62 ret = clk_request(dev, &clk);
63 if (ret < 0) {
64 debug("%s clk_request() failed: %d\n", __func__, ret);
65 continue;
66 }
67
68 ret = clk_get_rate(&clk);
69 rate = ret;
70
71 clk_free(&clk);
72
73 if (ret == -ENOTSUPP) {
74 printf("clk ID %lu not supported yet\n",
75 imx8_clk_names[i].id);
76 continue;
77 }
78 if (ret < 0) {
79 printf("%s %lu: get_rate err: %d\n",
80 __func__, imx8_clk_names[i].id, ret);
81 continue;
82 }
83
84 printf("%s(%3lu):\t%lu\n",
85 imx8_clk_names[i].name, imx8_clk_names[i].id, rate);
86 }
87
88 return 0;
89 }
90 #endif
91
92 static struct clk_ops imx8_clk_ops = {
93 .set_rate = imx8_clk_set_rate,
94 .get_rate = imx8_clk_get_rate,
95 .enable = imx8_clk_enable,
96 .disable = imx8_clk_disable,
97 };
98
imx8_clk_probe(struct udevice * dev)99 static int imx8_clk_probe(struct udevice *dev)
100 {
101 return 0;
102 }
103
104 static const struct udevice_id imx8_clk_ids[] = {
105 { .compatible = "fsl,imx8qxp-clk" },
106 { .compatible = "fsl,imx8qm-clk" },
107 { },
108 };
109
110 U_BOOT_DRIVER(imx8_clk) = {
111 .name = "clk_imx8",
112 .id = UCLASS_CLK,
113 .of_match = imx8_clk_ids,
114 .ops = &imx8_clk_ops,
115 .probe = imx8_clk_probe,
116 .flags = DM_FLAG_PRE_RELOC,
117 };
118