1 // SPDX-License-Identifier: GPL-2.0+
2
3 #include <common.h>
4 #include <log.h>
5 #include <asm/io.h>
6 #include <clk-uclass.h>
7 #include <dm.h>
8 #include <regmap.h>
9 #include <syscon.h>
10 #include <dt-bindings/clock/g12a-aoclkc.h>
11
12 #include "clk_meson.h"
13
14 struct meson_clk {
15 struct regmap *map;
16 };
17
18 #define AO_CLK_GATE0 0x4c
19 #define AO_SAR_CLK 0x90
20
21 static struct meson_gate gates[] = {
22 MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 8),
23 MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 8),
24 };
25
meson_set_gate(struct clk * clk,bool on)26 static int meson_set_gate(struct clk *clk, bool on)
27 {
28 struct meson_clk *priv = dev_get_priv(clk->dev);
29 struct meson_gate *gate;
30
31 if (clk->id >= ARRAY_SIZE(gates))
32 return -ENOENT;
33
34 gate = &gates[clk->id];
35
36 if (gate->reg == 0)
37 return 0;
38
39 regmap_update_bits(priv->map, gate->reg,
40 BIT(gate->bit), on ? BIT(gate->bit) : 0);
41
42 return 0;
43 }
44
meson_clk_enable(struct clk * clk)45 static int meson_clk_enable(struct clk *clk)
46 {
47 return meson_set_gate(clk, true);
48 }
49
meson_clk_disable(struct clk * clk)50 static int meson_clk_disable(struct clk *clk)
51 {
52 return meson_set_gate(clk, false);
53 }
54
meson_clk_probe(struct udevice * dev)55 static int meson_clk_probe(struct udevice *dev)
56 {
57 struct meson_clk *priv = dev_get_priv(dev);
58
59 priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
60 if (IS_ERR(priv->map))
61 return PTR_ERR(priv->map);
62
63 return 0;
64 }
65
66 static struct clk_ops meson_clk_ops = {
67 .disable = meson_clk_disable,
68 .enable = meson_clk_enable,
69 };
70
71 static const struct udevice_id meson_clk_ids[] = {
72 { .compatible = "amlogic,meson-g12a-aoclkc" },
73 { }
74 };
75
76 U_BOOT_DRIVER(meson_clk_axg) = {
77 .name = "meson_clk_g12a_ao",
78 .id = UCLASS_CLK,
79 .of_match = meson_clk_ids,
80 .priv_auto = sizeof(struct meson_clk),
81 .ops = &meson_clk_ops,
82 .probe = meson_clk_probe,
83 };
84