1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * TI gate clock support
4 *
5 * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
6 *
7 * Loosely based on Linux kernel drivers/clk/ti/gate.c
8 */
9
10 #include <common.h>
11 #include <dm.h>
12 #include <dm/device_compat.h>
13 #include <clk-uclass.h>
14 #include <asm/io.h>
15 #include <linux/clk-provider.h>
16
17 struct clk_ti_gate_priv {
18 fdt_addr_t reg;
19 u8 enable_bit;
20 u32 flags;
21 bool invert_enable;
22 };
23
clk_ti_gate_disable(struct clk * clk)24 static int clk_ti_gate_disable(struct clk *clk)
25 {
26 struct clk_ti_gate_priv *priv = dev_get_priv(clk->dev);
27 u32 v;
28
29 v = readl(priv->reg);
30 if (priv->invert_enable)
31 v |= (1 << priv->enable_bit);
32 else
33 v &= ~(1 << priv->enable_bit);
34
35 writel(v, priv->reg);
36 /* No OCP barrier needed here since it is a disable operation */
37 return 0;
38 }
39
clk_ti_gate_enable(struct clk * clk)40 static int clk_ti_gate_enable(struct clk *clk)
41 {
42 struct clk_ti_gate_priv *priv = dev_get_priv(clk->dev);
43 u32 v;
44
45 v = readl(priv->reg);
46 if (priv->invert_enable)
47 v &= ~(1 << priv->enable_bit);
48 else
49 v |= (1 << priv->enable_bit);
50
51 writel(v, priv->reg);
52 /* OCP barrier */
53 v = readl(priv->reg);
54 return 0;
55 }
56
clk_ti_gate_of_to_plat(struct udevice * dev)57 static int clk_ti_gate_of_to_plat(struct udevice *dev)
58 {
59 struct clk_ti_gate_priv *priv = dev_get_priv(dev);
60
61 priv->reg = dev_read_addr(dev);
62 if (priv->reg == FDT_ADDR_T_NONE) {
63 dev_err(dev, "failed to get control register\n");
64 return -EINVAL;
65 }
66
67 dev_dbg(dev, "reg=0x%08lx\n", priv->reg);
68 priv->enable_bit = dev_read_u32_default(dev, "ti,bit-shift", 0);
69 if (dev_read_bool(dev, "ti,set-rate-parent"))
70 priv->flags |= CLK_SET_RATE_PARENT;
71
72 priv->invert_enable = dev_read_bool(dev, "ti,set-bit-to-disable");
73 return 0;
74 }
75
76 static struct clk_ops clk_ti_gate_ops = {
77 .enable = clk_ti_gate_enable,
78 .disable = clk_ti_gate_disable,
79 };
80
81 static const struct udevice_id clk_ti_gate_of_match[] = {
82 { .compatible = "ti,gate-clock" },
83 { },
84 };
85
86 U_BOOT_DRIVER(clk_ti_gate) = {
87 .name = "ti_gate_clock",
88 .id = UCLASS_CLK,
89 .of_match = clk_ti_gate_of_match,
90 .of_to_plat = clk_ti_gate_of_to_plat,
91 .priv_auto = sizeof(struct clk_ti_gate_priv),
92 .ops = &clk_ti_gate_ops,
93 };
94