1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4  * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <log.h>
10 #include <mmc.h>
11 #include <reset-uclass.h>
12 #include <sdhci.h>
13 #include <asm/arch/sdhci.h>
14 #include <asm/global_data.h>
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 struct sti_sdhci_plat {
19 	struct mmc_config cfg;
20 	struct mmc mmc;
21 	struct reset_ctl reset;
22 	int instance;
23 };
24 
25 /**
26  * sti_mmc_core_config: configure the Arasan HC
27  * @dev : udevice
28  *
29  * Description: this function is to configure the Arasan MMC HC.
30  * This should be called when the system starts in case of, on the SoC,
31  * it is needed to configure the host controller.
32  * This happens on some SoCs, i.e. StiH410, where the MMC0 inside the flashSS
33  * needs to be configured as MMC 4.5 to have full capabilities.
34  * W/o these settings the SDHCI could configure and use the embedded controller
35  * with limited features.
36  */
sti_mmc_core_config(struct udevice * dev)37 static int sti_mmc_core_config(struct udevice *dev)
38 {
39 	struct sti_sdhci_plat *plat = dev_get_plat(dev);
40 	struct sdhci_host *host = dev_get_priv(dev);
41 	int ret;
42 
43 	/* only MMC1 has a reset line */
44 	if (plat->instance) {
45 		ret = reset_deassert(&plat->reset);
46 		if (ret < 0) {
47 			pr_err("MMC1 deassert failed: %d", ret);
48 			return ret;
49 		}
50 	}
51 
52 	writel(STI_FLASHSS_MMC_CORE_CONFIG_1,
53 	       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_1);
54 
55 	if (plat->instance) {
56 		writel(STI_FLASHSS_MMC_CORE_CONFIG2,
57 		       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
58 		writel(STI_FLASHSS_MMC_CORE_CONFIG3,
59 		       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
60 	} else {
61 		writel(STI_FLASHSS_SDCARD_CORE_CONFIG2,
62 		       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
63 		writel(STI_FLASHSS_SDCARD_CORE_CONFIG3,
64 		       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
65 	}
66 	writel(STI_FLASHSS_MMC_CORE_CONFIG4,
67 	       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
68 
69 	return 0;
70 }
71 
sti_sdhci_probe(struct udevice * dev)72 static int sti_sdhci_probe(struct udevice *dev)
73 {
74 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
75 	struct sti_sdhci_plat *plat = dev_get_plat(dev);
76 	struct sdhci_host *host = dev_get_priv(dev);
77 	int ret;
78 
79 	/*
80 	 * identify current mmc instance, mmc1 has a reset, not mmc0
81 	 * MMC0 is wired to the SD slot,
82 	 * MMC1 is wired on the high speed connector
83 	 */
84 	ret = reset_get_by_index(dev, 0, &plat->reset);
85 	if (!ret)
86 		plat->instance = 1;
87 	else
88 		if (ret == -ENOENT)
89 			plat->instance = 0;
90 		else
91 			return ret;
92 
93 	ret = sti_mmc_core_config(dev);
94 	if (ret)
95 		return ret;
96 
97 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
98 		       SDHCI_QUIRK_32BIT_DMA_ADDR |
99 		       SDHCI_QUIRK_NO_HISPD_BIT;
100 
101 	host->host_caps = MMC_MODE_DDR_52MHz;
102 	host->mmc = &plat->mmc;
103 	host->mmc->dev = dev;
104 	host->mmc->priv = host;
105 
106 	ret = sdhci_setup_cfg(&plat->cfg, host, 50000000, 400000);
107 	if (ret)
108 		return ret;
109 
110 	upriv->mmc = host->mmc;
111 
112 	return sdhci_probe(dev);
113 }
114 
sti_sdhci_of_to_plat(struct udevice * dev)115 static int sti_sdhci_of_to_plat(struct udevice *dev)
116 {
117 	struct sdhci_host *host = dev_get_priv(dev);
118 
119 	host->name = strdup(dev->name);
120 	host->ioaddr = dev_read_addr_ptr(dev);
121 
122 	host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
123 					 "bus-width", 4);
124 
125 	return 0;
126 }
127 
sti_sdhci_bind(struct udevice * dev)128 static int sti_sdhci_bind(struct udevice *dev)
129 {
130 	struct sti_sdhci_plat *plat = dev_get_plat(dev);
131 
132 	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
133 }
134 
135 static const struct udevice_id sti_sdhci_ids[] = {
136 	{ .compatible = "st,sdhci" },
137 	{ }
138 };
139 
140 U_BOOT_DRIVER(sti_mmc) = {
141 	.name = "sti_sdhci",
142 	.id = UCLASS_MMC,
143 	.of_match = sti_sdhci_ids,
144 	.bind = sti_sdhci_bind,
145 	.ops = &sdhci_ops,
146 	.of_to_plat = sti_sdhci_of_to_plat,
147 	.probe = sti_sdhci_probe,
148 	.priv_auto	= sizeof(struct sdhci_host),
149 	.plat_auto	= sizeof(struct sti_sdhci_plat),
150 };
151