1 // SPDX-License-Identifier: GPL-2.0+
2
3 #include <common.h>
4 #include <asm/io.h>
5 #include <memalign.h>
6 #include <nand.h>
7 #include <linux/bitops.h>
8 #include <linux/err.h>
9 #include <linux/errno.h>
10 #include <linux/io.h>
11 #include <linux/ioport.h>
12 #include <dm.h>
13
14 #include "brcmnand.h"
15
16 struct bcm6858_nand_soc {
17 struct brcmnand_soc soc;
18 void __iomem *base;
19 };
20
21 #define BCM6858_NAND_INT 0x00
22 #define BCM6858_NAND_STATUS_SHIFT 0
23 #define BCM6858_NAND_STATUS_MASK (0xfff << BCM6858_NAND_STATUS_SHIFT)
24
25 #define BCM6858_NAND_INT_EN 0x04
26 #define BCM6858_NAND_ENABLE_SHIFT 0
27 #define BCM6858_NAND_ENABLE_MASK (0xffff << BCM6858_NAND_ENABLE_SHIFT)
28
29 enum {
30 BCM6858_NP_READ = BIT(0),
31 BCM6858_BLOCK_ERASE = BIT(1),
32 BCM6858_COPY_BACK = BIT(2),
33 BCM6858_PAGE_PGM = BIT(3),
34 BCM6858_CTRL_READY = BIT(4),
35 BCM6858_DEV_RBPIN = BIT(5),
36 BCM6858_ECC_ERR_UNC = BIT(6),
37 BCM6858_ECC_ERR_CORR = BIT(7),
38 };
39
bcm6858_nand_intc_ack(struct brcmnand_soc * soc)40 static bool bcm6858_nand_intc_ack(struct brcmnand_soc *soc)
41 {
42 struct bcm6858_nand_soc *priv =
43 container_of(soc, struct bcm6858_nand_soc, soc);
44 void __iomem *mmio = priv->base + BCM6858_NAND_INT;
45 u32 val = brcmnand_readl(mmio);
46
47 if (val & (BCM6858_CTRL_READY << BCM6858_NAND_STATUS_SHIFT)) {
48 /* Ack interrupt */
49 val &= ~BCM6858_NAND_STATUS_MASK;
50 val |= BCM6858_CTRL_READY << BCM6858_NAND_STATUS_SHIFT;
51 brcmnand_writel(val, mmio);
52 return true;
53 }
54
55 return false;
56 }
57
bcm6858_nand_intc_set(struct brcmnand_soc * soc,bool en)58 static void bcm6858_nand_intc_set(struct brcmnand_soc *soc, bool en)
59 {
60 struct bcm6858_nand_soc *priv =
61 container_of(soc, struct bcm6858_nand_soc, soc);
62 void __iomem *mmio = priv->base + BCM6858_NAND_INT_EN;
63 u32 val = brcmnand_readl(mmio);
64
65 /* Don't ack any interrupts */
66 val &= ~BCM6858_NAND_STATUS_MASK;
67
68 if (en)
69 val |= BCM6858_CTRL_READY << BCM6858_NAND_ENABLE_SHIFT;
70 else
71 val &= ~(BCM6858_CTRL_READY << BCM6858_NAND_ENABLE_SHIFT);
72
73 brcmnand_writel(val, mmio);
74 }
75
bcm6858_nand_probe(struct udevice * dev)76 static int bcm6858_nand_probe(struct udevice *dev)
77 {
78 struct udevice *pdev = dev;
79 struct bcm6858_nand_soc *priv = dev_get_priv(dev);
80 struct brcmnand_soc *soc;
81 struct resource res;
82
83 soc = &priv->soc;
84
85 dev_read_resource_byname(pdev, "nand-int-base", &res);
86 priv->base = devm_ioremap(dev, res.start, resource_size(&res));
87 if (IS_ERR(priv->base))
88 return PTR_ERR(priv->base);
89
90 soc->ctlrdy_ack = bcm6858_nand_intc_ack;
91 soc->ctlrdy_set_enabled = bcm6858_nand_intc_set;
92
93 /* Disable and ack all interrupts */
94 brcmnand_writel(0, priv->base + BCM6858_NAND_INT_EN);
95 brcmnand_writel(0, priv->base + BCM6858_NAND_INT);
96
97 return brcmnand_probe(pdev, soc);
98 }
99
100 static const struct udevice_id bcm6858_nand_dt_ids[] = {
101 {
102 .compatible = "brcm,nand-bcm6858",
103 },
104 { /* sentinel */ }
105 };
106
107 U_BOOT_DRIVER(bcm6858_nand) = {
108 .name = "bcm6858-nand",
109 .id = UCLASS_MTD,
110 .of_match = bcm6858_nand_dt_ids,
111 .probe = bcm6858_nand_probe,
112 .priv_auto = sizeof(struct bcm6858_nand_soc),
113 };
114
board_nand_init(void)115 void board_nand_init(void)
116 {
117 struct udevice *dev;
118 int ret;
119
120 ret = uclass_get_device_by_driver(UCLASS_MTD,
121 DM_DRIVER_GET(bcm6858_nand), &dev);
122 if (ret && ret != -ENODEV)
123 pr_err("Failed to initialize %s. (error %d)\n", dev->name,
124 ret);
125 }
126