1 /*
2 Ported to U-Boot by Christian Pellegrin <chri@ascensit.com>
3 
4 Based on sources from the Linux kernel (pcnet_cs.c, 8390.h) and
5 eCOS(if_dp83902a.c, if_dp83902a.h). Both of these 2 wonderful world
6 are GPL, so this is, of course, GPL.
7 
8 ==========================================================================
9 
10 dev/if_dp83902a.c
11 
12 Ethernet device driver for NS DP83902a ethernet controller
13 
14 ==========================================================================
15 ####ECOSGPLCOPYRIGHTBEGIN####
16 -------------------------------------------
17 This file is part of eCos, the Embedded Configurable Operating System.
18 Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
19 
20 eCos is free software; you can redistribute it and/or modify it under
21 the terms of the GNU General Public License as published by the Free
22 Software Foundation; either version 2 or (at your option) any later version.
23 
24 eCos is distributed in the hope that it will be useful, but WITHOUT ANY
25 WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
27 for more details.
28 
29 You should have received a copy of the GNU General Public License along
30 with eCos; if not, write to the Free Software Foundation, Inc.,
31 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
32 
33 As a special exception, if other files instantiate templates or use macros
34 or inline functions from this file, or you compile this file and link it
35 with other works to produce a work based on this file, this file does not
36 by itself cause the resulting work to be covered by the GNU General Public
37 License. However the source code for this file must still be made available
38 in accordance with section (3) of the GNU General Public License.
39 
40 This exception does not invalidate any other reasons why a work based on
41 this file might be covered by the GNU General Public License.
42 
43 Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
44 at http://sources.redhat.com/ecos/ecos-license/
45 -------------------------------------------
46 ####ECOSGPLCOPYRIGHTEND####
47 ####BSDCOPYRIGHTBEGIN####
48 
49 -------------------------------------------
50 
51 Portions of this software may have been derived from OpenBSD or other sources,
52 and are covered by the appropriate copyright disclaimers included herein.
53 
54 -------------------------------------------
55 
56 ####BSDCOPYRIGHTEND####
57 ==========================================================================
58 #####DESCRIPTIONBEGIN####
59 
60 Author(s):	gthomas
61 Contributors:	gthomas, jskov, rsandifo
62 Date:		2001-06-13
63 Purpose:
64 Description:
65 
66 FIXME:		Will fail if pinged with large packets (1520 bytes)
67 Add promisc config
68 Add SNMP
69 
70 ####DESCRIPTIONEND####
71 
72 ==========================================================================
73 */
74 
75 #include <common.h>
76 #include <command.h>
77 #include <linux/delay.h>
78 
79 /* NE2000 base header file */
80 #include "ne2000_base.h"
81 
82 /* find prom (taken from pc_net_cs.c from Linux) */
83 
84 #include "8390.h"
85 /*
86 typedef struct hw_info_t {
87 	u_int	offset;
88 	u_char	a0, a1, a2;
89 	u_int	flags;
90 } hw_info_t;
91 */
92 #define DELAY_OUTPUT	0x01
93 #define HAS_MISC_REG	0x02
94 #define USE_BIG_BUF	0x04
95 #define HAS_IBM_MISC	0x08
96 #define IS_DL10019	0x10
97 #define IS_DL10022	0x20
98 #define HAS_MII		0x40
99 #define USE_SHMEM	0x80	/* autodetected */
100 
101 #define AM79C9XX_HOME_PHY	0x00006B90	/* HomePNA PHY */
102 #define AM79C9XX_ETH_PHY	0x00006B70	/* 10baseT PHY */
103 #define MII_PHYID_REV_MASK	0xfffffff0
104 #define MII_PHYID_REG1		0x02
105 #define MII_PHYID_REG2		0x03
106 
107 static hw_info_t hw_info[] = {
108 	{ /* Accton EN2212 */ 0x0ff0, 0x00, 0x00, 0xe8, DELAY_OUTPUT },
109 	{ /* Allied Telesis LA-PCM */ 0x0ff0, 0x00, 0x00, 0xf4, 0 },
110 	{ /* APEX MultiCard */ 0x03f4, 0x00, 0x20, 0xe5, 0 },
111 	{ /* ASANTE FriendlyNet */ 0x4910, 0x00, 0x00, 0x94,
112 			DELAY_OUTPUT | HAS_IBM_MISC },
113 	{ /* Danpex EN-6200P2 */ 0x0110, 0x00, 0x40, 0xc7, 0 },
114 	{ /* DataTrek NetCard */ 0x0ff0, 0x00, 0x20, 0xe8, 0 },
115 	{ /* Dayna CommuniCard E */ 0x0110, 0x00, 0x80, 0x19, 0 },
116 	{ /* D-Link DE-650 */ 0x0040, 0x00, 0x80, 0xc8, 0 },
117 	{ /* EP-210 Ethernet */ 0x0110, 0x00, 0x40, 0x33, 0 },
118 	{ /* EP4000 Ethernet */ 0x01c0, 0x00, 0x00, 0xb4, 0 },
119 	{ /* Epson EEN10B */ 0x0ff0, 0x00, 0x00, 0x48,
120 			HAS_MISC_REG | HAS_IBM_MISC },
121 	{ /* ELECOM Laneed LD-CDWA */ 0xb8, 0x08, 0x00, 0x42, 0 },
122 	{ /* Hypertec Ethernet */ 0x01c0, 0x00, 0x40, 0x4c, 0 },
123 	{ /* IBM CCAE */ 0x0ff0, 0x08, 0x00, 0x5a,
124 			HAS_MISC_REG | HAS_IBM_MISC },
125 	{ /* IBM CCAE */ 0x0ff0, 0x00, 0x04, 0xac,
126 			HAS_MISC_REG | HAS_IBM_MISC },
127 	{ /* IBM CCAE */ 0x0ff0, 0x00, 0x06, 0x29,
128 			HAS_MISC_REG | HAS_IBM_MISC },
129 	{ /* IBM FME */ 0x0374, 0x08, 0x00, 0x5a,
130 			HAS_MISC_REG | HAS_IBM_MISC },
131 	{ /* IBM FME */ 0x0374, 0x00, 0x04, 0xac,
132 			HAS_MISC_REG | HAS_IBM_MISC },
133 	{ /* Kansai KLA-PCM/T */ 0x0ff0, 0x00, 0x60, 0x87,
134 			HAS_MISC_REG | HAS_IBM_MISC },
135 	{ /* NSC DP83903 */ 0x0374, 0x08, 0x00, 0x17,
136 			HAS_MISC_REG | HAS_IBM_MISC },
137 	{ /* NSC DP83903 */ 0x0374, 0x00, 0xc0, 0xa8,
138 			HAS_MISC_REG | HAS_IBM_MISC },
139 	{ /* NSC DP83903 */ 0x0374, 0x00, 0xa0, 0xb0,
140 			HAS_MISC_REG | HAS_IBM_MISC },
141 	{ /* NSC DP83903 */ 0x0198, 0x00, 0x20, 0xe0,
142 			HAS_MISC_REG | HAS_IBM_MISC },
143 	{ /* I-O DATA PCLA/T */ 0x0ff0, 0x00, 0xa0, 0xb0, 0 },
144 	{ /* Katron PE-520 */ 0x0110, 0x00, 0x40, 0xf6, 0 },
145 	{ /* Kingston KNE-PCM/x */ 0x0ff0, 0x00, 0xc0, 0xf0,
146 			HAS_MISC_REG | HAS_IBM_MISC },
147 	{ /* Kingston KNE-PCM/x */ 0x0ff0, 0xe2, 0x0c, 0x0f,
148 			HAS_MISC_REG | HAS_IBM_MISC },
149 	{ /* Kingston KNE-PC2 */ 0x0180, 0x00, 0xc0, 0xf0, 0 },
150 	{ /* Maxtech PCN2000 */ 0x5000, 0x00, 0x00, 0xe8, 0 },
151 	{ /* NDC Instant-Link */ 0x003a, 0x00, 0x80, 0xc6, 0 },
152 	{ /* NE2000 Compatible */ 0x0ff0, 0x00, 0xa0, 0x0c, 0 },
153 	{ /* Network General Sniffer */ 0x0ff0, 0x00, 0x00, 0x65,
154 			HAS_MISC_REG | HAS_IBM_MISC },
155 	{ /* Panasonic VEL211 */ 0x0ff0, 0x00, 0x80, 0x45,
156 			HAS_MISC_REG | HAS_IBM_MISC },
157 	{ /* PreMax PE-200 */ 0x07f0, 0x00, 0x20, 0xe0, 0 },
158 	{ /* RPTI EP400 */ 0x0110, 0x00, 0x40, 0x95, 0 },
159 	{ /* SCM Ethernet */ 0x0ff0, 0x00, 0x20, 0xcb, 0 },
160 	{ /* Socket EA */ 0x4000, 0x00, 0xc0, 0x1b,
161 			DELAY_OUTPUT | HAS_MISC_REG | USE_BIG_BUF },
162 	{ /* Socket LP-E CF+ */ 0x01c0, 0x00, 0xc0, 0x1b, 0 },
163 	{ /* SuperSocket RE450T */ 0x0110, 0x00, 0xe0, 0x98, 0 },
164 	{ /* Volktek NPL-402CT */ 0x0060, 0x00, 0x40, 0x05, 0 },
165 	{ /* NEC PC-9801N-J12 */ 0x0ff0, 0x00, 0x00, 0x4c, 0 },
166 	{ /* PCMCIA Technology OEM */ 0x01c8, 0x00, 0xa0, 0x0c, 0 },
167 	{ /* Qemu */ 0x0, 0x52, 0x54, 0x00, 0 },
168 	{ /* RTL8019AS */ 0x0, 0x0, 0x18, 0x5f, 0 }
169 };
170 
171 #define NR_INFO		(sizeof(hw_info)/sizeof(hw_info_t))
172 
173 #define PCNET_CMD	0x00
174 #define PCNET_DATAPORT	0x10	/* NatSemi-defined port window offset. */
175 #define PCNET_RESET	0x1f	/* Issue a read to reset, a write to clear. */
176 #define PCNET_MISC	0x18	/* For IBM CCAE and Socket EA cards */
177 
pcnet_reset_8390(u8 * addr)178 static void pcnet_reset_8390(u8* addr)
179 {
180 	int i, r;
181 
182 	n2k_outb(E8390_NODMA + E8390_PAGE0+E8390_STOP, E8390_CMD);
183 	PRINTK("cmd (at %lx) is %x\n", addr + E8390_CMD, n2k_inb(E8390_CMD));
184 	n2k_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, E8390_CMD);
185 	PRINTK("cmd (at %lx) is %x\n", addr + E8390_CMD, n2k_inb(E8390_CMD));
186 	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
187 	PRINTK("cmd (at %lx) is %x\n", addr + E8390_CMD, n2k_inb(E8390_CMD));
188 	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
189 
190 	n2k_outb(n2k_inb(PCNET_RESET), PCNET_RESET);
191 
192 	for (i = 0; i < 100; i++) {
193 		if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
194 			break;
195 		PRINTK("got %x in reset\n", r);
196 		udelay(100);
197 	}
198 	n2k_outb(ENISR_RESET, EN0_ISR); /* Ack intr. */
199 
200 	if (i == 100)
201 		printf("pcnet_reset_8390() did not complete.\n");
202 } /* pcnet_reset_8390 */
203 
get_prom(u8 * mac_addr,u8 * base_addr)204 int get_prom(u8* mac_addr, u8* base_addr)
205 {
206 	u8 prom[32];
207 	int i, j;
208 	struct {
209 		u_char value, offset;
210 	} program_seq[] = {
211 		{E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/
212 		{0x48, EN0_DCFG},		/* Set byte-wide (0x48) access. */
213 		{0x00, EN0_RCNTLO},		/* Clear the count regs. */
214 		{0x00, EN0_RCNTHI},
215 		{0x00, EN0_IMR},		/* Mask completion irq. */
216 		{0xFF, EN0_ISR},
217 		{E8390_RXOFF, EN0_RXCR},	/* 0x20 Set to monitor */
218 		{E8390_TXOFF, EN0_TXCR},	/* 0x02 and loopback mode. */
219 		{32, EN0_RCNTLO},
220 		{0x00, EN0_RCNTHI},
221 		{0x00, EN0_RSARLO},		/* DMA starting at 0x0000. */
222 		{0x00, EN0_RSARHI},
223 		{E8390_RREAD+E8390_START, E8390_CMD},
224 	};
225 
226 	PRINTK ("trying to get MAC via prom reading\n");
227 
228 	pcnet_reset_8390 (base_addr);
229 
230 	mdelay (10);
231 
232 	for (i = 0; i < ARRAY_SIZE(program_seq); i++)
233 		n2k_outb (program_seq[i].value, program_seq[i].offset);
234 
235 	PRINTK ("PROM:");
236 	for (i = 0; i < 32; i++) {
237 		prom[i] = n2k_inb (PCNET_DATAPORT);
238 		PRINTK (" %02x", prom[i]);
239 	}
240 	PRINTK ("\n");
241 	for (i = 0; i < NR_INFO; i++) {
242 		if ((prom[0] == hw_info[i].a0) &&
243 			(prom[2] == hw_info[i].a1) &&
244 			(prom[4] == hw_info[i].a2)) {
245 			PRINTK ("matched board %d\n", i);
246 			break;
247 		}
248 	}
249 	if ((i < NR_INFO) || ((prom[28] == 0x57) && (prom[30] == 0x57))) {
250 		PRINTK ("on exit i is %d/%ld\n", i, NR_INFO);
251 		PRINTK ("MAC address is ");
252 		for (j = 0; j < 6; j++) {
253 			mac_addr[j] = prom[j << 1];
254 			PRINTK ("%02x:", mac_addr[i]);
255 		}
256 		PRINTK ("\n");
257 		return (i < NR_INFO) ? i : 0;
258 	}
259 	return 0;
260 }
261