1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2015-2016 Marvell International Ltd.
4 */
5
6 #include <common.h>
7 #include <log.h>
8 #include <asm/io.h>
9
10 #include "comphy_core.h"
11 #include "comphy_hpipe.h"
12
13 /*
14 * comphy_mux_check_config()
15 * description: this function passes over the COMPHY lanes and check if the type
16 * is valid for specific lane. If the type is not valid,
17 * the function update the struct and set the type of the lane as
18 * PHY_TYPE_UNCONNECTED
19 */
comphy_mux_check_config(struct comphy_mux_data * mux_data,struct comphy_map * comphy_map_data,int comphy_max_lanes)20 static void comphy_mux_check_config(struct comphy_mux_data *mux_data,
21 struct comphy_map *comphy_map_data, int comphy_max_lanes)
22 {
23 struct comphy_mux_options *mux_opt;
24 int lane, opt, valid;
25
26 debug_enter();
27
28 for (lane = 0; lane < comphy_max_lanes;
29 lane++, comphy_map_data++, mux_data++) {
30 /* Don't check ignored COMPHYs */
31 if (comphy_map_data->type == PHY_TYPE_IGNORE)
32 continue;
33
34 mux_opt = mux_data->mux_values;
35 for (opt = 0, valid = 0; opt < mux_data->max_lane_values;
36 opt++, mux_opt++) {
37 if (mux_opt->type == comphy_map_data->type) {
38 valid = 1;
39 break;
40 }
41 }
42 if (valid == 0) {
43 debug("lane number %d, had invalid type %d\n",
44 lane, comphy_map_data->type);
45 debug("set lane %d as type %d\n", lane,
46 PHY_TYPE_UNCONNECTED);
47 comphy_map_data->type = PHY_TYPE_UNCONNECTED;
48 } else {
49 debug("lane number %d, has type %d\n",
50 lane, comphy_map_data->type);
51 }
52 }
53
54 debug_exit();
55 }
56
comphy_mux_get_mux_value(struct comphy_mux_data * mux_data,u32 type,int lane)57 static u32 comphy_mux_get_mux_value(struct comphy_mux_data *mux_data,
58 u32 type, int lane)
59 {
60 struct comphy_mux_options *mux_opt;
61 int opt;
62 u32 value = 0;
63
64 debug_enter();
65
66 mux_opt = mux_data->mux_values;
67 for (opt = 0 ; opt < mux_data->max_lane_values; opt++, mux_opt++) {
68 if (mux_opt->type == type) {
69 value = mux_opt->mux_value;
70 break;
71 }
72 }
73
74 debug_exit();
75
76 return value;
77 }
78
comphy_mux_reg_write(struct comphy_mux_data * mux_data,struct comphy_map * comphy_map_data,int comphy_max_lanes,void __iomem * selector_base,const fdt32_t * mux_lane_order,u32 bitcount)79 static void comphy_mux_reg_write(struct comphy_mux_data *mux_data,
80 struct comphy_map *comphy_map_data,
81 int comphy_max_lanes,
82 void __iomem *selector_base,
83 const fdt32_t *mux_lane_order, u32 bitcount)
84 {
85 u32 lane, value, offset, mask;
86
87 debug_enter();
88
89 for (lane = 0; lane < comphy_max_lanes;
90 lane++, comphy_map_data++, mux_data++) {
91 if (comphy_map_data->type == PHY_TYPE_IGNORE)
92 continue;
93
94 /*
95 * if the order of nodes in selector base register is
96 * nontrivial, use mapping from mux_lane_order
97 */
98 if (mux_lane_order)
99 offset = fdt32_to_cpu(mux_lane_order[lane]) * bitcount;
100 else
101 offset = lane * bitcount;
102
103 mask = (((1 << bitcount) - 1) << offset);
104 value = (comphy_mux_get_mux_value(mux_data,
105 comphy_map_data->type,
106 lane) << offset);
107 reg_set(selector_base, value, mask);
108 }
109
110 debug_exit();
111 }
112
comphy_mux_init(struct chip_serdes_phy_config * chip_cfg,struct comphy_map * comphy_map_data,void __iomem * selector_base)113 void comphy_mux_init(struct chip_serdes_phy_config *chip_cfg,
114 struct comphy_map *comphy_map_data,
115 void __iomem *selector_base)
116 {
117 struct comphy_mux_data *mux_data;
118 const fdt32_t *mux_lane_order;
119 u32 mux_bitcount;
120 u32 comphy_max_lanes;
121
122 debug_enter();
123
124 comphy_max_lanes = chip_cfg->comphy_lanes_count;
125 mux_data = chip_cfg->mux_data;
126 mux_lane_order = chip_cfg->comphy_mux_lane_order;
127 mux_bitcount = chip_cfg->comphy_mux_bitcount;
128
129 /* check if the configuration is valid */
130 comphy_mux_check_config(mux_data, comphy_map_data, comphy_max_lanes);
131 /* Init COMPHY selectors */
132 comphy_mux_reg_write(mux_data, comphy_map_data, comphy_max_lanes,
133 selector_base, mux_lane_order, mux_bitcount);
134
135 debug_exit();
136 }
137