1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /********************************************************************** 3 * Copyright (C) 2012-2019 Cadence Design Systems, Inc. 4 ********************************************************************** 5 * WARNING: This file is auto-generated using api-generator utility. 6 * api-generator: 12.02.13bb8d5 7 * Do not edit it manually. 8 ********************************************************************** 9 * Cadence Core Driver for LPDDR4. 10 ********************************************************************** 11 */ 12 #ifndef LPDDR4_OBJ_IF_H 13 #define LPDDR4_OBJ_IF_H 14 15 #include "lpddr4_if.h" 16 17 /** @defgroup DriverObject Driver API Object 18 * API listing for the driver. The API is contained in the object as 19 * function pointers in the object structure. As the actual functions 20 * resides in the Driver Object, the client software must first use the 21 * global GetInstance function to obtain the Driver Object Pointer. 22 * The actual APIs then can be invoked using obj->(api_name)() syntax. 23 * These functions are defined in the header file of the core driver 24 * and utilized by the API. 25 * @{ 26 */ 27 28 /********************************************************************** 29 * API methods 30 **********************************************************************/ 31 typedef struct lpddr4_obj_s 32 { 33 /** 34 * Checks configuration object. 35 * @param[in] config Driver/hardware configuration required. 36 * @param[out] configSize Size of memory allocations required. 37 * @return CDN_EOK on success (requirements structure filled). 38 * @return ENOTSUP if configuration cannot be supported due to driver/hardware constraints. 39 */ 40 uint32_t (*probe)(const lpddr4_config* config, uint16_t* configsize); 41 42 /** 43 * Init function to be called after LPDDR4_probe() to set up the 44 * driver configuration. Memory should be allocated for drv_data 45 * (using the size determined using LPDDR4_probe) before calling 46 * this API. init_settings should be initialised with base addresses 47 * for PHY Indepenent Module, Controller and PHY before calling this 48 * function. If callbacks are required for interrupt handling, these 49 * should also be configured in init_settings. 50 * @param[in] pD Driver state info specific to this instance. 51 * @param[in] cfg Specifies driver/hardware configuration. 52 * @return CDN_EOK on success 53 * @return EINVAL if illegal/inconsistent values in cfg. 54 * @return ENOTSUP if hardware has an inconsistent configuration or doesn't support feature(s) required by 'config' parameters. 55 */ 56 uint32_t (*init)(lpddr4_privatedata* pd, const lpddr4_config* cfg); 57 58 /** 59 * Start the driver. 60 * @param[in] pD Driver state info specific to this instance. 61 */ 62 uint32_t (*start)(const lpddr4_privatedata* pd); 63 64 /** 65 * Read a register from the controller, PHY or PHY Independent Module 66 * @param[in] pD Driver state info specific to this instance. 67 * @param[in] cpp Indicates whether controller, PHY or PHY Independent Module register 68 * @param[in] regOffset Register offset 69 * @param[out] regValue Register value read 70 * @return CDN_EOK on success. 71 * @return EINVAL if regOffset if out of range or regValue is NULL 72 */ 73 uint32_t (*readreg)(const lpddr4_privatedata* pd, lpddr4_regblock cpp, uint32_t regoffset, uint32_t* regvalue); 74 75 /** 76 * Write a register in the controller, PHY or PHY Independent Module 77 * @param[in] pD Driver state info specific to this instance. 78 * @param[in] cpp Indicates whether controller, PHY or PHY Independent Module register 79 * @param[in] regOffset Register offset 80 * @param[in] regValue Register value to be written 81 * @return CDN_EOK on success. 82 * @return EINVAL if regOffset is out of range or regValue is NULL 83 */ 84 uint32_t (*writereg)(const lpddr4_privatedata* pd, lpddr4_regblock cpp, uint32_t regoffset, uint32_t regvalue); 85 86 /** 87 * Read a memory mode register from DRAM 88 * @param[in] pD Driver state info specific to this instance. 89 * @param[in] readModeRegVal Value to set in 'read_modereg' parameter. 90 * @param[out] mmrValue Value which is read from memory mode register(mmr) for all devices. 91 * @param[out] mmrStatus Status of mode register read(mrr) instruction. 92 * @return CDN_EOK on success. 93 * @return EINVAL if regNumber is out of range or regValue is NULL 94 */ 95 uint32_t (*getmmrregister)(const lpddr4_privatedata* pd, uint32_t readmoderegval, uint64_t* mmrvalue, uint8_t* mmrstatus); 96 97 /** 98 * Write a memory mode register in DRAM 99 * @param[in] pD Driver state info specific to this instance. 100 * @param[in] writeModeRegVal Value to set in 'write_modereg' parameter. 101 * @param[out] mrwStatus Status of mode register write(mrw) instruction. 102 * @return CDN_EOK on success. 103 * @return EINVAL if regNumber is out of range or regValue is NULL 104 */ 105 uint32_t (*setmmrregister)(const lpddr4_privatedata* pd, uint32_t writemoderegval, uint8_t* mrwstatus); 106 107 /** 108 * Write a set of initialisation values to the controller registers 109 * @param[in] pD Driver state info specific to this instance. 110 * @param[in] regValues Register values to be written 111 * @return CDN_EOK on success. 112 * @return EINVAL if regValues is NULL 113 */ 114 uint32_t (*writectlconfig)(const lpddr4_privatedata* pd, const lpddr4_reginitdata* regvalues); 115 116 /** 117 * Write a set of initialisation values to the PHY registers 118 * @param[in] pD Driver state info specific to this instance. 119 * @param[in] regValues Register values to be written 120 * @return CDN_EOK on success. 121 * @return EINVAL if regValues is NULL 122 */ 123 uint32_t (*writephyconfig)(const lpddr4_privatedata* pd, const lpddr4_reginitdata* regvalues); 124 125 /** 126 * Write a set of initialisation values to the PHY Independent Module 127 * registers 128 * @param[in] pD Driver state info specific to this instance. 129 * @param[in] regValues Register values to be written 130 * @return CDN_EOK on success. 131 * @return EINVAL if regValues is NULL 132 */ 133 uint32_t (*writephyindepconfig)(const lpddr4_privatedata* pd, const lpddr4_reginitdata* regvalues); 134 135 /** 136 * Read values of the controller registers in bulk (Set 137 * 'updateCtlReg' to read) and store in memory. 138 * @param[in] pD Driver state info specific to this instance. 139 * @param[out] regValues Register values which are read 140 * @return CDN_EOK on success. 141 * @return EINVAL if regValues is NULL 142 */ 143 uint32_t (*readctlconfig)(const lpddr4_privatedata* pd, lpddr4_reginitdata* regvalues); 144 145 /** 146 * Read the values of the PHY module registers in bulk (Set 147 * 'updatePhyReg' to read) and store in memory. 148 * @param[in] pD Driver state info specific to this instance. 149 * @param[out] regValues Register values which are read 150 * @return CDN_EOK on success. 151 * @return EINVAL if regValues is NULL 152 */ 153 uint32_t (*readphyconfig)(const lpddr4_privatedata* pd, lpddr4_reginitdata* regvalues); 154 155 /** 156 * Read the values of the PHY Independent module registers in 157 * bulk(Set 'updatePhyIndepReg' to read) and store in memory. 158 * @param[in] pD Driver state info specific to this instance. 159 * @param[out] regValues Register values which are read 160 * @return CDN_EOK on success. 161 * @return EINVAL if regValues is NULL 162 */ 163 uint32_t (*readphyindepconfig)(const lpddr4_privatedata* pd, lpddr4_reginitdata* regvalues); 164 165 /** 166 * Read the current interrupt mask for the controller 167 * @param[in] pD Driver state info specific to this instance. 168 * @param[out] mask Value of interrupt mask 169 * @return CDN_EOK on success. 170 * @return EINVAL if mask pointer is NULL 171 */ 172 uint32_t (*getctlinterruptmask)(const lpddr4_privatedata* pd, uint64_t* mask); 173 174 /** 175 * Sets the interrupt mask for the controller 176 * @param[in] pD Driver state info specific to this instance. 177 * @param[in] mask Value of interrupt mask to be written 178 * @return CDN_EOK on success. 179 * @return EINVAL if mask pointer is NULL 180 */ 181 uint32_t (*setctlinterruptmask)(const lpddr4_privatedata* pd, const uint64_t* mask); 182 183 /** 184 * Check whether a specific controller interrupt is active 185 * @param[in] pD Driver state info specific to this instance. 186 * @param[in] intr Interrupt to be checked 187 * @param[out] irqStatus Status of the interrupt, TRUE if active 188 * @return CDN_EOK on success. 189 * @return EINVAL if intr is not valid 190 */ 191 uint32_t (*checkctlinterrupt)(const lpddr4_privatedata* pd, lpddr4_ctlinterrupt intr, bool* irqstatus); 192 193 /** 194 * Acknowledge a specific controller interrupt 195 * @param[in] pD Driver state info specific to this instance. 196 * @param[in] intr Interrupt to be acknowledged 197 * @return CDN_EOK on success. 198 * @return EINVAL if intr is not valid 199 */ 200 uint32_t (*ackctlinterrupt)(const lpddr4_privatedata* pd, lpddr4_ctlinterrupt intr); 201 202 /** 203 * Read the current interrupt mask for the PHY Independent Module 204 * @param[in] pD Driver state info specific to this instance. 205 * @param[out] mask Value of interrupt mask 206 * @return CDN_EOK on success. 207 * @return EINVAL if mask pointer is NULL 208 */ 209 uint32_t (*getphyindepinterruptmask)(const lpddr4_privatedata* pd, uint32_t* mask); 210 211 /** 212 * Sets the interrupt mask for the PHY Independent Module 213 * @param[in] pD Driver state info specific to this instance. 214 * @param[in] mask Value of interrupt mask to be written 215 * @return CDN_EOK on success. 216 * @return EINVAL if mask pointer is NULL 217 */ 218 uint32_t (*setphyindepinterruptmask)(const lpddr4_privatedata* pd, const uint32_t* mask); 219 220 /** 221 * Check whether a specific PHY Independent Module interrupt is 222 * active 223 * @param[in] pD Driver state info specific to this instance. 224 * @param[in] intr Interrupt to be checked 225 * @param[out] irqStatus Status of the interrupt, TRUE if active 226 * @return CDN_EOK on success. 227 * @return EINVAL if intr is not valid 228 */ 229 uint32_t (*checkphyindepinterrupt)(const lpddr4_privatedata* pd, lpddr4_phyindepinterrupt intr, bool* irqstatus); 230 231 /** 232 * Acknowledge a specific PHY Independent Module interrupt 233 * @param[in] pD Driver state info specific to this instance. 234 * @param[in] intr Interrupt to be acknowledged 235 * @return CDN_EOK on success. 236 * @return EINVAL if intr is not valid 237 */ 238 uint32_t (*ackphyindepinterrupt)(const lpddr4_privatedata* pd, lpddr4_phyindepinterrupt intr); 239 240 /** 241 * Retrieve status information after a failed init. The 242 * DebugStructInfo will be filled in with error codes which can be 243 * referenced against the driver documentation for further details. 244 * @param[in] pD Driver state info specific to this instance. 245 * @param[out] debugInfo status 246 * @return CDN_EOK on success. 247 * @return EINVAL if debugInfo is NULL 248 */ 249 uint32_t (*getdebuginitinfo)(const lpddr4_privatedata* pd, lpddr4_debuginfo* debuginfo); 250 251 /** 252 * Get the current value of Low power Interface wake up time. 253 * @param[in] pD Driver state info specific to this instance. 254 * @param[in] lpiWakeUpParam LPI timing parameter 255 * @param[in] fspNum Frequency copy 256 * @param[out] cycles Timing value(in cycles) 257 * @return CDN_EOK on success. 258 * @return EINVAL if powerMode is NULL 259 */ 260 uint32_t (*getlpiwakeuptime)(const lpddr4_privatedata* pd, const lpddr4_lpiwakeupparam* lpiwakeupparam, const lpddr4_ctlfspnum* fspnum, uint32_t* cycles); 261 262 /** 263 * Set the current value of Low power Interface wake up time. 264 * @param[in] pD Driver state info specific to this instance. 265 * @param[in] lpiWakeUpParam LPI timing parameter 266 * @param[in] fspNum Frequency copy 267 * @param[in] cycles Timing value(in cycles) 268 * @return CDN_EOK on success. 269 * @return EINVAL if powerMode is NULL 270 */ 271 uint32_t (*setlpiwakeuptime)(const lpddr4_privatedata* pd, const lpddr4_lpiwakeupparam* lpiwakeupparam, const lpddr4_ctlfspnum* fspnum, const uint32_t* cycles); 272 273 /** 274 * Get the current value for ECC auto correction 275 * @param[in] pD Driver state info specific to this instance. 276 * @param[out] eccParam ECC parameter setting 277 * @return CDN_EOK on success. 278 * @return EINVAL if on_off is NULL 279 */ 280 uint32_t (*geteccenable)(const lpddr4_privatedata* pd, lpddr4_eccenable* eccparam); 281 282 /** 283 * Set the value for ECC auto correction. This API must be called 284 * before startup of memory. 285 * @param[in] pD Driver state info specific to this instance. 286 * @param[in] eccParam ECC control parameter setting 287 * @return CDN_EOK on success. 288 * @return EINVAL if on_off is NULL 289 */ 290 uint32_t (*seteccenable)(const lpddr4_privatedata* pd, const lpddr4_eccenable* eccparam); 291 292 /** 293 * Get the current value for the Half Datapath option 294 * @param[in] pD Driver state info specific to this instance. 295 * @param[out] mode Half Datapath setting 296 * @return CDN_EOK on success. 297 * @return EINVAL if mode is NULL 298 */ 299 uint32_t (*getreducmode)(const lpddr4_privatedata* pd, lpddr4_reducmode* mode); 300 301 /** 302 * Set the value for the Half Datapath option. This API must be 303 * called before startup of memory. 304 * @param[in] pD Driver state info specific to this instance. 305 * @param[in] mode Half Datapath setting 306 * @return CDN_EOK on success. 307 * @return EINVAL if mode is NULL 308 */ 309 uint32_t (*setreducmode)(const lpddr4_privatedata* pd, const lpddr4_reducmode* mode); 310 311 /** 312 * Get the current value for Data Bus Inversion setting. This will 313 * be compared with the current DRAM setting using the MR3 314 * register. 315 * @param[in] pD Driver state info specific to this instance. 316 * @param[out] on_off DBI read value 317 * @return CDN_EOK on success. 318 * @return EINVAL if on_off is NULL 319 */ 320 uint32_t (*getdbireadmode)(const lpddr4_privatedata* pd, bool* on_off); 321 322 /** 323 * Get the current value for Data Bus Inversion setting. This will 324 * be compared with the current DRAM setting using the MR3 325 * register. 326 * @param[in] pD Driver state info specific to this instance. 327 * @param[out] on_off DBI write value 328 * @return CDN_EOK on success. 329 * @return EINVAL if on_off is NULL 330 */ 331 uint32_t (*getdbiwritemode)(const lpddr4_privatedata* pd, bool* on_off); 332 333 /** 334 * Set the mode for Data Bus Inversion. This will also be set in DRAM 335 * using the MR3 controller register. This API must be called 336 * before startup of memory. 337 * @param[in] pD Driver state info specific to this instance. 338 * @param[in] mode status 339 * @return CDN_EOK on success. 340 * @return EINVAL if mode is NULL 341 */ 342 uint32_t (*setdbimode)(const lpddr4_privatedata* pd, const lpddr4_dbimode* mode); 343 344 /** 345 * Get the current value for the refresh rate (reading Refresh per 346 * command timing). 347 * @param[in] pD Driver state info specific to this instance. 348 * @param[in] fspNum Frequency set number 349 * @param[out] cycles Refresh rate (in cycles) 350 * @return CDN_EOK on success. 351 * @return EINVAL if rate is NULL 352 */ 353 uint32_t (*getrefreshrate)(const lpddr4_privatedata* pd, const lpddr4_ctlfspnum* fspnum, uint32_t* cycles); 354 355 /** 356 * Set the refresh rate (writing Refresh per command timing). 357 * @param[in] pD Driver state info specific to this instance. 358 * @param[in] fspNum Frequency set number 359 * @param[in] cycles Refresh rate (in cycles) 360 * @return CDN_EOK on success. 361 * @return EINVAL if rate is NULL 362 */ 363 uint32_t (*setrefreshrate)(const lpddr4_privatedata* pd, const lpddr4_ctlfspnum* fspnum, const uint32_t* cycles); 364 365 /** 366 * Handle Refreshing per chip select 367 * @param[in] pD Driver state info specific to this instance. 368 * @param[in] trefInterval status 369 * @return CDN_EOK on success. 370 * @return EINVAL if chipSelect is invalid 371 */ 372 uint32_t (*refreshperchipselect)(const lpddr4_privatedata* pd, const uint32_t trefinterval); 373 374 } LPDDR4_OBJ; 375 376 /** 377 * In order to access the LPDDR4 APIs, the upper layer software must call 378 * this global function to obtain the pointer to the driver object. 379 * @return LPDDR4_OBJ* Driver Object Pointer 380 */ 381 extern LPDDR4_OBJ *lpddr4_getinstance(void); 382 383 #endif /* LPDDR4_OBJ_IF_H */ 384