1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <serial.h>
9 #include <asm/io.h>
10
11 struct mvebu_plat {
12 void __iomem *base;
13 };
14
15 /*
16 * Register offset
17 */
18 #define UART_RX_REG 0x00
19 #define UART_TX_REG 0x04
20 #define UART_CTRL_REG 0x08
21 #define UART_STATUS_REG 0x0c
22 #define UART_BAUD_REG 0x10
23 #define UART_POSSR_REG 0x14
24
25 #define UART_STATUS_RX_RDY 0x10
26 #define UART_STATUS_TX_EMPTY 0x40
27 #define UART_STATUS_TXFIFO_FULL 0x800
28
29 #define UART_CTRL_RXFIFO_RESET 0x4000
30 #define UART_CTRL_TXFIFO_RESET 0x8000
31
32 #define CONFIG_UART_BASE_CLOCK 25804800
33
mvebu_serial_putc(struct udevice * dev,const char ch)34 static int mvebu_serial_putc(struct udevice *dev, const char ch)
35 {
36 struct mvebu_plat *plat = dev_get_plat(dev);
37 void __iomem *base = plat->base;
38
39 while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL)
40 ;
41
42 writel(ch, base + UART_TX_REG);
43
44 return 0;
45 }
46
mvebu_serial_getc(struct udevice * dev)47 static int mvebu_serial_getc(struct udevice *dev)
48 {
49 struct mvebu_plat *plat = dev_get_plat(dev);
50 void __iomem *base = plat->base;
51
52 while (!(readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY))
53 ;
54
55 return readl(base + UART_RX_REG) & 0xff;
56 }
57
mvebu_serial_pending(struct udevice * dev,bool input)58 static int mvebu_serial_pending(struct udevice *dev, bool input)
59 {
60 struct mvebu_plat *plat = dev_get_plat(dev);
61 void __iomem *base = plat->base;
62
63 if (input) {
64 if (readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY)
65 return 1;
66 } else {
67 if (!(readl(base + UART_STATUS_REG) & UART_STATUS_TX_EMPTY))
68 return 1;
69 }
70
71 return 0;
72 }
73
mvebu_serial_setbrg(struct udevice * dev,int baudrate)74 static int mvebu_serial_setbrg(struct udevice *dev, int baudrate)
75 {
76 struct mvebu_plat *plat = dev_get_plat(dev);
77 void __iomem *base = plat->base;
78
79 /*
80 * Calculate divider
81 * baudrate = clock / 16 / divider
82 */
83 writel(CONFIG_UART_BASE_CLOCK / baudrate / 16, base + UART_BAUD_REG);
84
85 /*
86 * Set Programmable Oversampling Stack to 0,
87 * UART defaults to 16x scheme
88 */
89 writel(0, base + UART_POSSR_REG);
90
91 return 0;
92 }
93
mvebu_serial_probe(struct udevice * dev)94 static int mvebu_serial_probe(struct udevice *dev)
95 {
96 struct mvebu_plat *plat = dev_get_plat(dev);
97 void __iomem *base = plat->base;
98
99 /* reset FIFOs */
100 writel(UART_CTRL_RXFIFO_RESET | UART_CTRL_TXFIFO_RESET,
101 base + UART_CTRL_REG);
102
103 /* No Parity, 1 Stop */
104 writel(0, base + UART_CTRL_REG);
105
106 return 0;
107 }
108
mvebu_serial_of_to_plat(struct udevice * dev)109 static int mvebu_serial_of_to_plat(struct udevice *dev)
110 {
111 struct mvebu_plat *plat = dev_get_plat(dev);
112
113 plat->base = dev_read_addr_ptr(dev);
114
115 return 0;
116 }
117
118 static const struct dm_serial_ops mvebu_serial_ops = {
119 .putc = mvebu_serial_putc,
120 .pending = mvebu_serial_pending,
121 .getc = mvebu_serial_getc,
122 .setbrg = mvebu_serial_setbrg,
123 };
124
125 static const struct udevice_id mvebu_serial_ids[] = {
126 { .compatible = "marvell,armada-3700-uart" },
127 { }
128 };
129
130 U_BOOT_DRIVER(serial_mvebu) = {
131 .name = "serial_mvebu",
132 .id = UCLASS_SERIAL,
133 .of_match = mvebu_serial_ids,
134 .of_to_plat = mvebu_serial_of_to_plat,
135 .plat_auto = sizeof(struct mvebu_plat),
136 .probe = mvebu_serial_probe,
137 .ops = &mvebu_serial_ops,
138 };
139
140 #ifdef CONFIG_DEBUG_MVEBU_A3700_UART
141
142 #include <debug_uart.h>
143
_debug_uart_init(void)144 static inline void _debug_uart_init(void)
145 {
146 void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
147
148 /* reset FIFOs */
149 writel(UART_CTRL_RXFIFO_RESET | UART_CTRL_TXFIFO_RESET,
150 base + UART_CTRL_REG);
151
152 /* No Parity, 1 Stop */
153 writel(0, base + UART_CTRL_REG);
154
155 /*
156 * Calculate divider
157 * baudrate = clock / 16 / divider
158 */
159 writel(CONFIG_UART_BASE_CLOCK / 115200 / 16, base + UART_BAUD_REG);
160
161 /*
162 * Set Programmable Oversampling Stack to 0,
163 * UART defaults to 16x scheme
164 */
165 writel(0, base + UART_POSSR_REG);
166 }
167
_debug_uart_putc(int ch)168 static inline void _debug_uart_putc(int ch)
169 {
170 void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
171
172 while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL)
173 ;
174
175 writel(ch, base + UART_TX_REG);
176 }
177
178 DEBUG_UART_FUNCS
179 #endif
180