1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2009 SAMSUNG Electronics
4  * Minkyu Kang <mk7.kang@samsung.com>
5  * Heungjun Kim <riverful.kim@samsung.com>
6  *
7  * based on drivers/serial/s3c64xx.c
8  */
9 
10 #include <common.h>
11 #include <dm.h>
12 #include <errno.h>
13 #include <fdtdec.h>
14 #include <asm/global_data.h>
15 #include <linux/compiler.h>
16 #include <asm/io.h>
17 #include <asm/arch/clk.h>
18 #include <asm/arch/uart.h>
19 #include <serial.h>
20 #include <clk.h>
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 #define RX_FIFO_COUNT_SHIFT	0
25 #define RX_FIFO_COUNT_MASK	(0xff << RX_FIFO_COUNT_SHIFT)
26 #define RX_FIFO_FULL		(1 << 8)
27 #define TX_FIFO_COUNT_SHIFT	16
28 #define TX_FIFO_COUNT_MASK	(0xff << TX_FIFO_COUNT_SHIFT)
29 #define TX_FIFO_FULL		(1 << 24)
30 
31 /* Information about a serial port */
32 struct s5p_serial_plat {
33 	struct s5p_uart *reg;  /* address of registers in physical memory */
34 	u8 port_id;     /* uart port number */
35 };
36 
37 /*
38  * The coefficient, used to calculate the baudrate on S5P UARTs is
39  * calculated as
40  * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
41  * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
42  * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
43  */
44 static const int udivslot[] = {
45 	0,
46 	0x0080,
47 	0x0808,
48 	0x0888,
49 	0x2222,
50 	0x4924,
51 	0x4a52,
52 	0x54aa,
53 	0x5555,
54 	0xd555,
55 	0xd5d5,
56 	0xddd5,
57 	0xdddd,
58 	0xdfdd,
59 	0xdfdf,
60 	0xffdf,
61 };
62 
s5p_serial_init(struct s5p_uart * uart)63 static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
64 {
65 	/* enable FIFOs, auto clear Rx FIFO */
66 	writel(0x3, &uart->ufcon);
67 	writel(0, &uart->umcon);
68 	/* 8N1 */
69 	writel(0x3, &uart->ulcon);
70 	/* No interrupts, no DMA, pure polling */
71 	writel(0x245, &uart->ucon);
72 }
73 
s5p_serial_baud(struct s5p_uart * uart,uint uclk,int baudrate)74 static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
75 					   int baudrate)
76 {
77 	u32 val;
78 
79 	val = uclk / baudrate;
80 
81 	writel(val / 16 - 1, &uart->ubrdiv);
82 
83 	if (s5p_uart_divslot())
84 		writew(udivslot[val % 16], &uart->rest.slot);
85 	else
86 		writeb(val % 16, &uart->rest.value);
87 }
88 
89 #ifndef CONFIG_SPL_BUILD
s5p_serial_setbrg(struct udevice * dev,int baudrate)90 int s5p_serial_setbrg(struct udevice *dev, int baudrate)
91 {
92 	struct s5p_serial_plat *plat = dev_get_plat(dev);
93 	struct s5p_uart *const uart = plat->reg;
94 	u32 uclk;
95 
96 #ifdef CONFIG_CLK_EXYNOS
97 	struct clk clk;
98 	u32 ret;
99 
100 	ret = clk_get_by_index(dev, 1, &clk);
101 	if (ret < 0)
102 		return ret;
103 	uclk = clk_get_rate(&clk);
104 #else
105 	uclk = get_uart_clk(plat->port_id);
106 #endif
107 
108 	s5p_serial_baud(uart, uclk, baudrate);
109 
110 	return 0;
111 }
112 
s5p_serial_probe(struct udevice * dev)113 static int s5p_serial_probe(struct udevice *dev)
114 {
115 	struct s5p_serial_plat *plat = dev_get_plat(dev);
116 	struct s5p_uart *const uart = plat->reg;
117 
118 	s5p_serial_init(uart);
119 
120 	return 0;
121 }
122 
serial_err_check(const struct s5p_uart * const uart,int op)123 static int serial_err_check(const struct s5p_uart *const uart, int op)
124 {
125 	unsigned int mask;
126 
127 	/*
128 	 * UERSTAT
129 	 * Break Detect	[3]
130 	 * Frame Err	[2] : receive operation
131 	 * Parity Err	[1] : receive operation
132 	 * Overrun Err	[0] : receive operation
133 	 */
134 	if (op)
135 		mask = 0x8;
136 	else
137 		mask = 0xf;
138 
139 	return readl(&uart->uerstat) & mask;
140 }
141 
s5p_serial_getc(struct udevice * dev)142 static int s5p_serial_getc(struct udevice *dev)
143 {
144 	struct s5p_serial_plat *plat = dev_get_plat(dev);
145 	struct s5p_uart *const uart = plat->reg;
146 
147 	if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
148 		return -EAGAIN;
149 
150 	serial_err_check(uart, 0);
151 	return (int)(readb(&uart->urxh) & 0xff);
152 }
153 
s5p_serial_putc(struct udevice * dev,const char ch)154 static int s5p_serial_putc(struct udevice *dev, const char ch)
155 {
156 	struct s5p_serial_plat *plat = dev_get_plat(dev);
157 	struct s5p_uart *const uart = plat->reg;
158 
159 	if (readl(&uart->ufstat) & TX_FIFO_FULL)
160 		return -EAGAIN;
161 
162 	writeb(ch, &uart->utxh);
163 	serial_err_check(uart, 1);
164 
165 	return 0;
166 }
167 
s5p_serial_pending(struct udevice * dev,bool input)168 static int s5p_serial_pending(struct udevice *dev, bool input)
169 {
170 	struct s5p_serial_plat *plat = dev_get_plat(dev);
171 	struct s5p_uart *const uart = plat->reg;
172 	uint32_t ufstat = readl(&uart->ufstat);
173 
174 	if (input)
175 		return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
176 	else
177 		return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
178 }
179 
s5p_serial_of_to_plat(struct udevice * dev)180 static int s5p_serial_of_to_plat(struct udevice *dev)
181 {
182 	struct s5p_serial_plat *plat = dev_get_plat(dev);
183 	fdt_addr_t addr;
184 
185 	addr = dev_read_addr(dev);
186 	if (addr == FDT_ADDR_T_NONE)
187 		return -EINVAL;
188 
189 	plat->reg = (struct s5p_uart *)addr;
190 	plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
191 					"id", dev_seq(dev));
192 	return 0;
193 }
194 
195 static const struct dm_serial_ops s5p_serial_ops = {
196 	.putc = s5p_serial_putc,
197 	.pending = s5p_serial_pending,
198 	.getc = s5p_serial_getc,
199 	.setbrg = s5p_serial_setbrg,
200 };
201 
202 static const struct udevice_id s5p_serial_ids[] = {
203 	{ .compatible = "samsung,exynos4210-uart" },
204 	{ }
205 };
206 
207 U_BOOT_DRIVER(serial_s5p) = {
208 	.name	= "serial_s5p",
209 	.id	= UCLASS_SERIAL,
210 	.of_match = s5p_serial_ids,
211 	.of_to_plat = s5p_serial_of_to_plat,
212 	.plat_auto	= sizeof(struct s5p_serial_plat),
213 	.probe = s5p_serial_probe,
214 	.ops	= &s5p_serial_ops,
215 };
216 #endif
217 
218 #ifdef CONFIG_DEBUG_UART_S5P
219 
220 #include <debug_uart.h>
221 
_debug_uart_init(void)222 static inline void _debug_uart_init(void)
223 {
224 	struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
225 
226 	s5p_serial_init(uart);
227 	s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
228 }
229 
_debug_uart_putc(int ch)230 static inline void _debug_uart_putc(int ch)
231 {
232 	struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
233 
234 	while (readl(&uart->ufstat) & TX_FIFO_FULL);
235 
236 	writeb(ch, &uart->utxh);
237 }
238 
239 DEBUG_UART_FUNCS
240 
241 #endif
242