1 /* 2 * Register definitions for the Atmel AT32/AT91 SPI Controller 3 */ 4 5 /* Register offsets */ 6 #include <linux/bitops.h> 7 #define ATMEL_SPI_CR 0x0000 8 #define ATMEL_SPI_MR 0x0004 9 #define ATMEL_SPI_RDR 0x0008 10 #define ATMEL_SPI_TDR 0x000c 11 #define ATMEL_SPI_SR 0x0010 12 #define ATMEL_SPI_IER 0x0014 13 #define ATMEL_SPI_IDR 0x0018 14 #define ATMEL_SPI_IMR 0x001c 15 #define ATMEL_SPI_CSR(x) (0x0030 + 4 * (x)) 16 #define ATMEL_SPI_VERSION 0x00fc 17 18 /* Bits in CR */ 19 #define ATMEL_SPI_CR_SPIEN BIT(0) 20 #define ATMEL_SPI_CR_SPIDIS BIT(1) 21 #define ATMEL_SPI_CR_SWRST BIT(7) 22 #define ATMEL_SPI_CR_LASTXFER BIT(24) 23 24 /* Bits in MR */ 25 #define ATMEL_SPI_MR_MSTR BIT(0) 26 #define ATMEL_SPI_MR_PS BIT(1) 27 #define ATMEL_SPI_MR_PCSDEC BIT(2) 28 #define ATMEL_SPI_MR_FDIV BIT(3) 29 #define ATMEL_SPI_MR_MODFDIS BIT(4) 30 #define ATMEL_SPI_MR_WDRBT BIT(5) 31 #define ATMEL_SPI_MR_LLB BIT(7) 32 #define ATMEL_SPI_MR_PCS(x) (((x) & 15) << 16) 33 #define ATMEL_SPI_MR_DLYBCS(x) ((x) << 24) 34 35 /* Bits in RDR */ 36 #define ATMEL_SPI_RDR_RD(x) (x) 37 #define ATMEL_SPI_RDR_PCS(x) ((x) << 16) 38 39 /* Bits in TDR */ 40 #define ATMEL_SPI_TDR_TD(x) (x) 41 #define ATMEL_SPI_TDR_PCS(x) ((x) << 16) 42 #define ATMEL_SPI_TDR_LASTXFER BIT(24) 43 44 /* Bits in SR/IER/IDR/IMR */ 45 #define ATMEL_SPI_SR_RDRF BIT(0) 46 #define ATMEL_SPI_SR_TDRE BIT(1) 47 #define ATMEL_SPI_SR_MODF BIT(2) 48 #define ATMEL_SPI_SR_OVRES BIT(3) 49 #define ATMEL_SPI_SR_ENDRX BIT(4) 50 #define ATMEL_SPI_SR_ENDTX BIT(5) 51 #define ATMEL_SPI_SR_RXBUFF BIT(6) 52 #define ATMEL_SPI_SR_TXBUFE BIT(7) 53 #define ATMEL_SPI_SR_NSSR BIT(8) 54 #define ATMEL_SPI_SR_TXEMPTY BIT(9) 55 #define ATMEL_SPI_SR_SPIENS BIT(16) 56 57 /* Bits in CSRx */ 58 #define ATMEL_SPI_CSRx_CPOL BIT(0) 59 #define ATMEL_SPI_CSRx_NCPHA BIT(1) 60 #define ATMEL_SPI_CSRx_CSAAT BIT(3) 61 #define ATMEL_SPI_CSRx_BITS(x) ((x) << 4) 62 #define ATMEL_SPI_CSRx_SCBR(x) ((x) << 8) 63 #define ATMEL_SPI_CSRx_SCBR_MAX GENMASK(7, 0) 64 #define ATMEL_SPI_CSRx_DLYBS(x) ((x) << 16) 65 #define ATMEL_SPI_CSRx_DLYBCT(x) ((x) << 24) 66 67 /* Bits in VERSION */ 68 #define ATMEL_SPI_VERSION_REV(x) ((x) & 0xfff) 69 #define ATMEL_SPI_VERSION_MFN(x) ((x) << 16) 70 71 /* Constants for CSRx:BITS */ 72 #define ATMEL_SPI_BITS_8 0 73 #define ATMEL_SPI_BITS_9 1 74 #define ATMEL_SPI_BITS_10 2 75 #define ATMEL_SPI_BITS_11 3 76 #define ATMEL_SPI_BITS_12 4 77 #define ATMEL_SPI_BITS_13 5 78 #define ATMEL_SPI_BITS_14 6 79 #define ATMEL_SPI_BITS_15 7 80 #define ATMEL_SPI_BITS_16 8 81 82 /* Register access macros */ 83 #define spi_readl(as, reg) \ 84 readl(as->regs + ATMEL_SPI_##reg) 85 #define spi_writel(as, reg, value) \ 86 writel(value, as->regs + ATMEL_SPI_##reg) 87