1config USB_DWC3
2	bool "DesignWare USB3 DRD Core Support"
3	depends on USB_HOST || USB_GADGET
4	help
5	  Say Y here if your system has a Dual Role SuperSpeed
6	  USB controller based on the DesignWare USB3 IP Core.
7
8if USB_DWC3
9
10config USB_DWC3_GADGET
11	bool "USB Gadget support for DWC3"
12	default y
13	depends on USB_GADGET
14	select USB_GADGET_DUALSPEED
15
16comment "Platform Glue Driver Support"
17
18config USB_DWC3_OMAP
19	bool "Texas Instruments OMAP5 and similar Platforms"
20	help
21	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
22	  AM437x use this IP for USB2/3 functionality.
23
24	  Say 'Y' here if you have one such device
25
26config USB_DWC3_GENERIC
27	bool "Generic implementation of a DWC3 wrapper (aka dwc3 glue)"
28	depends on DM_USB && USB_DWC3 && MISC
29	help
30	  Select this for Xilinx ZynqMP and similar Platforms.
31	  This wrapper supports Host and Peripheral operation modes.
32
33config USB_DWC3_MESON_G12A
34	bool "Amlogic Meson G12A USB wrapper"
35	depends on DM_USB && USB_DWC3 && ARCH_MESON
36	imply PHY
37	help
38	  Select this for Amlogic Meson G12A Platforms.
39	  This wrapper supports Host and Peripheral operation modes.
40
41config USB_DWC3_MESON_GXL
42	bool "Amlogic Meson GXL USB wrapper"
43	depends on DM_USB && USB_DWC3 && ARCH_MESON
44	imply PHY
45	help
46	  Select this for Amlogic Meson GXL and GXM Platforms.
47	  This wrapper supports Host and Peripheral operation modes.
48
49config USB_DWC3_UNIPHIER
50	bool "DesignWare USB3 Host Support on UniPhier Platforms"
51	depends on ARCH_UNIPHIER && USB_XHCI_DWC3
52	help
53	  Support of USB2/3 functionality in Socionext UniPhier platforms.
54	  Say 'Y' here if you have one such device.
55
56menu "PHY Subsystem"
57
58config USB_DWC3_PHY_OMAP
59	bool "TI OMAP SoC series USB DRD PHY driver"
60	help
61	  Enable single driver for both USB2 PHY programming and USB3 PHY
62	  programming for TI SoCs.
63
64config USB_DWC3_PHY_SAMSUNG
65	bool "Exynos5 SoC series USB DRD PHY driver"
66	help
67	  Enable USB DRD PHY support for Exynos 5 SoC series.
68	  This driver provides PHY interface for USB 3.0 DRD controller
69	  present on Exynos5 SoC series.
70
71endmenu
72
73endif
74