1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
4 * Copyright (c) 2015 Google, Inc
5 * Copyright 2014 Rockchip Inc.
6 */
7
8 #include <common.h>
9 #include <display.h>
10 #include <dm.h>
11 #include <log.h>
12 #include <regmap.h>
13 #include <video.h>
14 #include <asm/arch-rockchip/hardware.h>
15 #include <asm/global_data.h>
16 #include <asm/io.h>
17 #include "rk_vop.h"
18
19 DECLARE_GLOBAL_DATA_PTR;
20
rk3399_set_pin_polarity(struct udevice * dev,enum vop_modes mode,u32 polarity)21 static void rk3399_set_pin_polarity(struct udevice *dev,
22 enum vop_modes mode, u32 polarity)
23 {
24 struct rk_vop_priv *priv = dev_get_priv(dev);
25 struct rk3288_vop *regs = priv->regs;
26
27 /*
28 * The RK3399 VOPs (v3.5 and v3.6) require a per-mode setting of
29 * the polarity configuration (in ctrl1).
30 */
31 switch (mode) {
32 case VOP_MODE_HDMI:
33 clrsetbits_le32(®s->dsp_ctrl1,
34 M_RK3399_DSP_HDMI_POL,
35 V_RK3399_DSP_HDMI_POL(polarity));
36 break;
37
38 case VOP_MODE_EDP:
39 clrsetbits_le32(®s->dsp_ctrl1,
40 M_RK3399_DSP_EDP_POL,
41 V_RK3399_DSP_EDP_POL(polarity));
42 break;
43
44 case VOP_MODE_MIPI:
45 clrsetbits_le32(®s->dsp_ctrl1,
46 M_RK3399_DSP_MIPI_POL,
47 V_RK3399_DSP_MIPI_POL(polarity));
48 break;
49
50 default:
51 debug("%s: unsupported output mode %x\n", __func__, mode);
52 }
53 }
54
55 /*
56 * Try some common regulators. We should really get these from the
57 * device tree somehow.
58 */
59 static const char * const rk3399_regulator_names[] = {
60 "vcc33_lcd"
61 };
62
rk3399_vop_probe(struct udevice * dev)63 static int rk3399_vop_probe(struct udevice *dev)
64 {
65 /* Before relocation we don't need to do anything */
66 if (!(gd->flags & GD_FLG_RELOC))
67 return 0;
68
69 /* Probe regulators required for the RK3399 VOP */
70 rk_vop_probe_regulators(dev, rk3399_regulator_names,
71 ARRAY_SIZE(rk3399_regulator_names));
72
73 return rk_vop_probe(dev);
74 }
75
76 struct rkvop_driverdata rk3399_lit_driverdata = {
77 .set_pin_polarity = rk3399_set_pin_polarity,
78 };
79
80 struct rkvop_driverdata rk3399_big_driverdata = {
81 .features = VOP_FEATURE_OUTPUT_10BIT,
82 .set_pin_polarity = rk3399_set_pin_polarity,
83 };
84
85 static const struct udevice_id rk3399_vop_ids[] = {
86 { .compatible = "rockchip,rk3399-vop-big",
87 .data = (ulong)&rk3399_big_driverdata },
88 { .compatible = "rockchip,rk3399-vop-lit",
89 .data = (ulong)&rk3399_lit_driverdata },
90 { }
91 };
92
93 static const struct video_ops rk3399_vop_ops = {
94 };
95
96 U_BOOT_DRIVER(rk3399_vop) = {
97 .name = "rk3399_vop",
98 .id = UCLASS_VIDEO,
99 .of_match = rk3399_vop_ids,
100 .ops = &rk3399_vop_ops,
101 .bind = rk_vop_bind,
102 .probe = rk3399_vop_probe,
103 .priv_auto = sizeof(struct rk_vop_priv),
104 };
105