1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * cm_t43.h 4 * 5 * Copyright (C) 2015 Compulab, Ltd. 6 */ 7 8 #ifndef __CONFIG_CM_T43_H 9 #define __CONFIG_CM_T43_H 10 11 #define CONFIG_CM_T43 12 #define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */ 13 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 14 15 #include <asm/arch/omap.h> 16 17 /* Serial support */ 18 #define CONFIG_SYS_NS16550_SERIAL 19 #define CONFIG_SYS_NS16550_CLK 48000000 20 #define CONFIG_SYS_NS16550_COM1 0x44e09000 21 #if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL) 22 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 23 #endif 24 25 /* NAND support */ 26 #define CONFIG_SYS_NAND_ONFI_DETECTION 27 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 28 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 29 #define CONFIG_SYS_NAND_OOBSIZE 64 30 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 31 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 32 #define CONFIG_SYS_NAND_ECCSIZE 512 33 #define CONFIG_SYS_NAND_ECCBYTES 14 34 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 35 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 36 CONFIG_SYS_NAND_PAGE_SIZE) 37 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 38 10, 11, 12, 13, 14, 15, 16, 17, \ 39 18, 19, 20, 21, 22, 23, 24, 25, \ 40 26, 27, 28, 29, 30, 31, 32, 33, \ 41 34, 35, 36, 37, 38, 39, 40, 41, \ 42 42, 43, 44, 45, 46, 47, 48, 49, \ 43 50, 51, 52, 53, 54, 55, 56, 57, } 44 45 /* CPSW Ethernet support */ 46 #define CONFIG_SYS_RX_ETH_BUFFER 64 47 48 /* USB support */ 49 #define CONFIG_USB_XHCI_OMAP 50 #define CONFIG_AM437X_USB2PHY2_HOST 51 52 /* Power */ 53 #define CONFIG_POWER 54 #define CONFIG_POWER_I2C 55 #define CONFIG_POWER_TPS65218 56 57 /* Enabling L2 Cache */ 58 #define CONFIG_SYS_L2_PL310 59 #define CONFIG_SYS_PL310_BASE 0x48242000 60 61 /* 62 * Since SPL did pll and ddr initialization for us, 63 * we don't need to do it twice. 64 */ 65 #if !defined(CONFIG_SPL_BUILD) 66 #define CONFIG_SKIP_LOWLEVEL_INIT 67 #endif 68 69 #define CONFIG_HSMMC2_8BIT 70 71 #include <configs/ti_armv7_omap.h> 72 #undef CONFIG_SYS_MONITOR_LEN 73 74 #define V_OSCK 24000000 /* Clock output from T2 */ 75 #define V_SCLK (V_OSCK) 76 77 #define CONFIG_EXTRA_ENV_SETTINGS \ 78 "loadaddr=0x80200000\0" \ 79 "fdtaddr=0x81200000\0" \ 80 "bootm_size=0x8000000\0" \ 81 "autoload=no\0" \ 82 "console=ttyO0,115200n8\0" \ 83 "fdtfile=am437x-sb-som-t43.dtb\0" \ 84 "kernel=zImage-cm-t43\0" \ 85 "bootscr=bootscr.img\0" \ 86 "emmcroot=/dev/mmcblk0p2 rw\0" \ 87 "emmcrootfstype=ext4 rootwait\0" \ 88 "emmcargs=setenv bootargs console=${console} " \ 89 "root=${emmcroot} " \ 90 "rootfstype=${emmcrootfstype}\0" \ 91 "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \ 92 "bootscript=echo Running bootscript from mmc ...; " \ 93 "source ${loadaddr}\0" \ 94 "emmcboot=echo Booting from emmc ... && " \ 95 "run emmcargs && " \ 96 "load mmc 1 ${loadaddr} ${kernel} && " \ 97 "load mmc 1 ${fdtaddr} ${fdtfile} && " \ 98 "bootz ${loadaddr} - ${fdtaddr}\0" 99 100 #define CONFIG_BOOTCOMMAND \ 101 "mmc dev 0; " \ 102 "if mmc rescan; then " \ 103 "if run loadbootscript; then " \ 104 "run bootscript; " \ 105 "fi; " \ 106 "fi; " \ 107 "mmc dev 1; " \ 108 "if mmc rescan; then " \ 109 "run emmcboot; " \ 110 "fi;" 111 112 /* SPL defines. */ 113 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20)) 114 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 115 116 /* EEPROM */ 117 #define CONFIG_ENV_EEPROM_IS_ON_I2C 118 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 119 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 120 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 121 #define CONFIG_SYS_EEPROM_SIZE 256 122 123 #endif /* __CONFIG_CM_T43_H */ 124