1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2015-2019 Toradex, Inc. 4 * 5 * Configuration settings for the Toradex VF50/VF61 modules. 6 * 7 * Based on vf610twr.h: 8 * Copyright 2013 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 #include <asm/arch/imx-regs.h> 15 #include <linux/sizes.h> 16 17 #define CONFIG_SYS_FSL_CLK 18 19 #define CONFIG_SKIP_LOWLEVEL_INIT 20 21 #ifdef CONFIG_VIDEO_FSL_DCU_FB 22 #define CONFIG_VIDEO_LOGO 23 #define CONFIG_VIDEO_BMP_LOGO 24 #define CONFIG_SYS_FSL_DCU_LE 25 26 #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR 27 #define DCU_LAYER_MAX_NUM 64 28 #endif 29 30 /* Size of malloc() pool */ 31 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M) 32 33 /* NAND support */ 34 #define CONFIG_SYS_NAND_ONFI_DETECTION 35 #define CONFIG_SYS_MAX_NAND_DEVICE 1 36 37 #define CONFIG_IPADDR 192.168.10.2 38 #define CONFIG_NETMASK 255.255.255.0 39 #define CONFIG_SERVERIP 192.168.10.1 40 41 #define CONFIG_LOADADDR 0x80008000 42 #define CONFIG_FDTADDR 0x84000000 43 44 /* We boot from the gfxRAM area of the OCRAM. */ 45 #define CONFIG_BOARD_SIZE_LIMIT 520192 46 47 #define MEM_LAYOUT_ENV_SETTINGS \ 48 "bootm_size=0x10000000\0" \ 49 "fdt_addr_r=0x82000000\0" \ 50 "kernel_addr_r=0x81000000\0" \ 51 "pxefile_addr_r=0x87100000\0" \ 52 "ramdisk_addr_r=0x82100000\0" \ 53 "scriptaddr=0x87000000\0" 54 55 #define UBOOT_UPDATE \ 56 "update_uboot=nand erase.part u-boot && " \ 57 "nand write ${loadaddr} u-boot ${filesize}\0" \ 58 59 #define NFS_BOOTCMD \ 60 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ 61 "nfsboot=run setup; " \ 62 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \ 63 "${setupargs} ${vidargs}; echo Booting from NFS...;" \ 64 "dhcp ${kernel_addr_r} && " \ 65 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ 66 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 67 68 #define UBI_BOOTCMD \ 69 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ 70 "ubi.fm_autoconvert=1\0" \ 71 "ubiboot=run setup; " \ 72 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \ 73 "${setupargs} ${vidargs}; echo Booting from NAND...; " \ 74 "ubi part ubi && " \ 75 "ubi read ${kernel_addr_r} kernel && " \ 76 "ubi read ${fdt_addr_r} dtb && " \ 77 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 78 79 #define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;" 80 81 #define BOOT_TARGET_DEVICES(func) \ 82 func(MMC, mmc, 0) \ 83 func(USB, usb, 0) \ 84 func(DHCP, dhcp, na) 85 #include <config_distro_bootcmd.h> 86 #undef BOOTENV_RUN_NET_USB_START 87 #define BOOTENV_RUN_NET_USB_START "" 88 89 #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" 90 91 #define CONFIG_EXTRA_ENV_SETTINGS \ 92 BOOTENV \ 93 MEM_LAYOUT_ENV_SETTINGS \ 94 NFS_BOOTCMD \ 95 UBI_BOOTCMD \ 96 UBOOT_UPDATE \ 97 "console=ttyLP0\0" \ 98 "defargs=user_debug=30\0" \ 99 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ 100 "fdt_board=eval-v3\0" \ 101 "fdt_fixup=;\0" \ 102 "kernel_image=zImage\0" \ 103 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 104 "setsdupdate=mmc rescan && set interface mmc && " \ 105 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ 106 "source ${loadaddr}\0" \ 107 "setup=setenv setupargs console=tty1 console=${console}" \ 108 ",${baudrate}n8 ${memargs}\0" \ 109 "setupdate=run setsdupdate || run setusbupdate\0" \ 110 "setusbupdate=usb start && set interface usb && " \ 111 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ 112 "source ${loadaddr}\0" \ 113 "splashpos=m,m\0" \ 114 "video-mode=dcufb:640x480-16@60,monitor=lcd\0" 115 116 /* Miscellaneous configurable options */ 117 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 118 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 119 120 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 121 #define CONFIG_SYS_HZ 1000 122 123 /* Physical memory map */ 124 #define PHYS_SDRAM (0x80000000) 125 #define PHYS_SDRAM_SIZE (256 * SZ_1M) 126 127 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 128 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 129 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 130 131 #define CONFIG_SYS_INIT_SP_OFFSET \ 132 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 133 #define CONFIG_SYS_INIT_SP_ADDR \ 134 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 135 136 /* Environment organization */ 137 #ifdef CONFIG_ENV_IS_IN_NAND 138 #define CONFIG_ENV_RANGE (4 * 64 * 2048) 139 #endif 140 141 /* USB Host Support */ 142 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 143 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 144 145 /* USB DFU */ 146 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 147 148 #endif /* __CONFIG_H */ 149