1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2014 Gateworks Corporation
4  * Author: Tim Harvey <tharvey@gateworks.com>
5  */
6 #ifndef __IMX6_SPL_CONFIG_H
7 #define __IMX6_SPL_CONFIG_H
8 
9 #ifdef CONFIG_SPL
10 
11 #ifdef CONFIG_MX6_OCRAM_256KB
12 /*
13  * see Figure 8.4.1 in IMX6DQ Reference manuals:
14  *  - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF
15  *  - BOOT ROM stack is at 0x0093FFB8
16  *  - if icache/dcache is enabled (eFuse/strapping controlled) then the
17  *    IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to
18  *    fit between 0x00907000 and 0x00938000.
19  *  - Additionally the BOOT ROM loads what they consider the firmware image
20  *    which consists of a 4K header in front of us that contains the IVT, DCD
21  *    and some padding thus 'our' max size is really 0x00908000 - 0x00938000
22  *    or 192KB
23  */
24 #define CONFIG_SPL_MAX_SIZE		0x30000
25 #define CONFIG_SPL_STACK		0x0093FFB8
26 /*
27  * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the
28  * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
29  * boot media (given that boot media specific offset is configured properly).
30  */
31 #define CONFIG_SPL_PAD_TO		0x31000
32 #else
33 /*
34  * see Figure 8-3 in IMX6SDL Reference manuals:
35  *  - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
36  *  - BOOT ROM stack is at 0x0091FFB8
37  *  - if icache/dcache is enabled (eFuse/strapping controlled) then the
38  *    IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
39  *    fit between 0x00907000 and 0x00918000.
40  *  - Additionally the BOOT ROM loads what they consider the firmware image
41  *    which consists of a 4K header in front of us that contains the IVT, DCD
42  *    and some padding thus 'our' max size is really 0x00908000 - 0x00918000
43  *    or 64KB
44  */
45 #define CONFIG_SPL_MAX_SIZE		0x10000
46 #define CONFIG_SPL_STACK		0x0091FFB8
47 /*
48  * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
49  * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
50  * boot media (given that boot media specific offset is configured properly).
51  */
52 #define CONFIG_SPL_PAD_TO		0x11000
53 
54 #endif
55 
56 /* MMC support */
57 #if defined(CONFIG_SPL_MMC_SUPPORT)
58 #define CONFIG_SYS_MONITOR_LEN			409600	/* 400 KB */
59 #endif
60 
61 /* SATA support */
62 #if defined(CONFIG_SPL_SATA_SUPPORT)
63 #define CONFIG_SPL_SATA_BOOT_DEVICE		0
64 #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION	1
65 #endif
66 
67 /* Define the payload for FAT/EXT support */
68 #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
69 # ifdef CONFIG_OF_CONTROL
70 #  define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot-dtb.img"
71 # else
72 #  define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
73 # endif
74 #endif
75 
76 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
77 	defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
78 #define CONFIG_SPL_BSS_START_ADDR      0x88200000
79 #define CONFIG_SPL_BSS_MAX_SIZE        0x100000		/* 1 MB */
80 #define CONFIG_SYS_SPL_MALLOC_START    0x88300000
81 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000		/* 1 MB */
82 #else
83 #define CONFIG_SPL_BSS_START_ADDR	0x18200000
84 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000	/* 1 MB */
85 #define CONFIG_SYS_SPL_MALLOC_START	0x18300000
86 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000	/* 1 MB */
87 #endif
88 #endif
89 
90 #endif
91