1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2020 Compass Electronics Group, LLC 4 */ 5 6 #ifndef __IMX8MM_BEACON_H 7 #define __IMX8MM_BEACON_H 8 9 #include <linux/sizes.h> 10 #include <asm/arch/imx-regs.h> 11 12 #define CONFIG_SPL_MAX_SIZE (148 * 1024) 13 #define CONFIG_SYS_MONITOR_LEN SZ_512K 14 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 16 #define CONFIG_SYS_UBOOT_BASE \ 17 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) 18 19 #ifdef CONFIG_SPL_BUILD 20 #define CONFIG_SPL_STACK 0x920000 21 #define CONFIG_SPL_BSS_START_ADDR 0x910000 22 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ 23 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 24 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ 25 26 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ 27 #define CONFIG_MALLOC_F_ADDR 0x930000 28 /* For RAW image gives a error info not panic */ 29 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE 30 31 #endif 32 33 /* Initial environment variables */ 34 #define CONFIG_EXTRA_ENV_SETTINGS \ 35 "script=boot.scr\0" \ 36 "image=Image\0" \ 37 "console=ttymxc1,115200\0" \ 38 "fdt_addr=0x43000000\0" \ 39 "boot_fit=try\0" \ 40 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 41 "initrd_addr=0x43800000\0" \ 42 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 43 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 44 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ 45 "mmcautodetect=yes\0" \ 46 "mmcargs=setenv bootargs console=${console},${baudrate}" \ 47 " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \ 48 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \ 49 " ${script};\0" \ 50 "bootscript=echo Running bootscript from mmc ...; " \ 51 "source\0" \ 52 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 53 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 54 "mmcboot=echo Booting from mmc ...; " \ 55 "run finduuid; " \ 56 "run mmcargs; " \ 57 "if run loadfdt; then " \ 58 "booti ${loadaddr} - ${fdt_addr}; " \ 59 "else " \ 60 "echo WARN: Cannot load the DT; " \ 61 "fi; " \ 62 "netargs=setenv bootargs console=${console} " \ 63 "root=/dev/nfs " \ 64 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 65 "netboot=echo Booting from net ...; " \ 66 "run netargs; " \ 67 "if test ${ip_dyn} = yes; then " \ 68 "setenv get_cmd dhcp; " \ 69 "else " \ 70 "setenv get_cmd tftp; " \ 71 "fi; " \ 72 "${get_cmd} ${loadaddr} ${image}; " \ 73 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ 74 "bootm ${loadaddr}; " \ 75 "else " \ 76 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 77 "booti ${loadaddr} - ${fdt_addr}; " \ 78 "else " \ 79 "echo WARN: Cannot load the DT; " \ 80 "fi; " \ 81 "fi;\0" 82 83 #define CONFIG_BOOTCOMMAND \ 84 "mmc dev ${mmcdev}; if mmc rescan; then " \ 85 "if run loadbootscript; then " \ 86 "run bootscript; " \ 87 "else " \ 88 "if run loadimage; then " \ 89 "run mmcboot; " \ 90 "else run netboot; " \ 91 "fi; " \ 92 "fi; " \ 93 "fi;" 94 95 /* Link Definitions */ 96 #define CONFIG_LOADADDR 0x40480000 97 98 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 99 100 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 101 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 102 #define CONFIG_SYS_INIT_SP_OFFSET \ 103 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 104 #define CONFIG_SYS_INIT_SP_ADDR \ 105 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 106 107 /* Size of malloc() pool */ 108 #define CONFIG_SYS_MALLOC_LEN SZ_32M 109 110 #define CONFIG_SYS_SDRAM_BASE 0x40000000 111 #define PHYS_SDRAM 0x40000000 112 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ 113 114 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 115 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) 116 117 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR 118 119 /* Monitor Command Prompt */ 120 #define CONFIG_SYS_CBSIZE 2048 121 #define CONFIG_SYS_MAXARGS 64 122 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 123 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 124 sizeof(CONFIG_SYS_PROMPT) + 16) 125 126 /* USDHC */ 127 #define CONFIG_SYS_FSL_USDHC_NUM 2 128 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 129 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 130 131 /* I2C */ 132 #define CONFIG_SYS_I2C_SPEED 100000 133 134 /* FEC*/ 135 #define CONFIG_ETHPRIME "FEC" 136 #define CONFIG_FEC_XCV_TYPE RGMII 137 #define CONFIG_FEC_MXC_PHYADDR 0 138 #define FEC_QUIRK_ENET_MAC 139 #define IMX_FEC_BASE 0x30BE0000 140 141 #endif 142