1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2017-2018 NXP 4 */ 5 6 #ifndef __IMX8QM_ROM7720_H 7 #define __IMX8QM_ROM7720_H 8 9 #include <linux/sizes.h> 10 #include <linux/stringify.h> 11 #include <asm/arch/imx-regs.h> 12 #define CONFIG_REMAKE_ELF 13 14 #define CONFIG_SPL_MAX_SIZE (124 * 1024) 15 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 16 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ 17 18 #define CONFIG_FSL_USDHC 19 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) 20 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 21 #define USDHC1_BASE_ADDR 0x5B010000 22 #define USDHC2_BASE_ADDR 0x5B020000 23 #define USDHC3_BASE_ADDR 0x5B030000 24 25 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 26 27 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 28 /* FUSE command */ 29 30 /* Boot M4 */ 31 #define M4_BOOT_ENV \ 32 "m4_0_image=m4_0.bin\0" \ 33 "m4_1_image=m4_1.bin\0" \ 34 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ 35 "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \ 36 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ 37 "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \ 38 39 #ifdef CONFIG_NAND_BOOT 40 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) " 41 #else 42 #define MFG_NAND_PARTITION "" 43 #endif 44 45 #define CONFIG_MFG_ENV_SETTINGS \ 46 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 47 "rdinit=/linuxrc " \ 48 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 49 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 50 "g_mass_storage.iSerialNumber=\"\" "\ 51 MFG_NAND_PARTITION \ 52 "clk_ignore_unused "\ 53 "\0" \ 54 "initrd_addr=0x83800000\0" \ 55 "initrd_high=0xffffffffffffffff\0" \ 56 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 57 58 /* Initial environment variables */ 59 #define CONFIG_EXTRA_ENV_SETTINGS \ 60 CONFIG_MFG_ENV_SETTINGS \ 61 M4_BOOT_ENV \ 62 "script=boot.scr\0" \ 63 "image=Image\0" \ 64 "panel=NULL\0" \ 65 "console=ttyLP0\0" \ 66 "fdt_addr=0x83000000\0" \ 67 "boot_fdt=try\0" \ 68 "fdt_file=imx8qm-rom7720-a1.dtb\0" \ 69 "initrd_addr=0x83800000\0" \ 70 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 71 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 72 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 73 "mmcautodetect=yes\0" \ 74 "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ 75 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 76 "bootscript=echo Running bootscript from mmc ...; " \ 77 "source\0" \ 78 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 79 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 80 "mmcboot=echo Booting from mmc ...; " \ 81 "run mmcargs; " \ 82 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 83 "if run loadfdt; then " \ 84 "booti ${loadaddr} - ${fdt_addr}; " \ 85 "else " \ 86 "echo WARN: Cannot load the DT; " \ 87 "fi; " \ 88 "else " \ 89 "echo wait for boot; " \ 90 "fi;\0" \ 91 "netargs=setenv bootargs console=${console},${baudrate} " \ 92 "root=/dev/nfs " \ 93 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \ 94 "netboot=echo Booting from net ...; " \ 95 "run netargs; " \ 96 "if test ${ip_dyn} = yes; then " \ 97 "setenv get_cmd dhcp; " \ 98 "else " \ 99 "setenv get_cmd tftp; " \ 100 "fi; " \ 101 "${get_cmd} ${loadaddr} ${image}; " \ 102 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 103 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 104 "booti ${loadaddr} - ${fdt_addr}; " \ 105 "else " \ 106 "echo WARN: Cannot load the DT; " \ 107 "fi; " \ 108 "else " \ 109 "booti; " \ 110 "fi;\0" 111 112 #define CONFIG_BOOTCOMMAND \ 113 "mmc dev ${mmcdev}; if mmc rescan; then " \ 114 "if run loadbootscript; then " \ 115 "run bootscript; " \ 116 "else " \ 117 "if run loadimage; then " \ 118 "run mmcboot; " \ 119 "else run netboot; " \ 120 "fi; " \ 121 "fi; " \ 122 "else booti ${loadaddr} - ${fdt_addr}; fi" 123 124 /* Link Definitions */ 125 #define CONFIG_LOADADDR 0x80280000 126 127 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 128 129 #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 130 131 /* Default environment is in SD */ 132 133 #ifdef CONFIG_QSPI_BOOT 134 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 135 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 136 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 137 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 138 #endif 139 140 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 141 142 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board, 143 * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, 144 * USDHC2 is for SD, USDHC3 is for SD on base board 145 */ 146 #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */ 147 #define CONFIG_SYS_FSL_USDHC_NUM 3 148 149 /* Size of malloc() pool */ 150 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) 151 152 #define CONFIG_SYS_SDRAM_BASE 0x80000000 153 #define PHYS_SDRAM_1 0x80000000 154 #define PHYS_SDRAM_2 0x880000000 155 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ 156 /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */ 157 #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ 158 159 /* Generic Timer Definitions */ 160 #define COUNTER_FREQUENCY 8000000 /* 8MHz */ 161 162 /* Networking */ 163 #define CONFIG_FEC_XCV_TYPE RGMII 164 165 #include <linux/stringify.h> 166 #endif /* __IMX8QM_ROM7720_H */ 167