1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2020 NXP 4 * Copyright 2016 Freescale Semiconductor, Inc. 5 */ 6 7 #ifndef __LS1012ARDB_H__ 8 #define __LS1012ARDB_H__ 9 10 #include "ls1012a_common.h" 11 12 /* DDR */ 13 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 14 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 15 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 16 17 /* 18 * I2C IO expander 19 */ 20 21 #define I2C_MUX_IO_ADDR 0x24 22 #define I2C_MUX_IO2_ADDR 0x25 23 #define I2C_MUX_IO_0 0 24 #define I2C_MUX_IO_1 1 25 #define SW_BOOT_MASK 0x03 26 #define SW_BOOT_EMU 0x02 27 #define SW_BOOT_BANK1 0x00 28 #define SW_BOOT_BANK2 0x01 29 #define SW_REV_MASK 0xF8 30 #define SW_REV_A 0xF8 31 #define SW_REV_B 0xF0 32 #define SW_REV_C 0xE8 33 #define SW_REV_C1 0xE0 34 #define SW_REV_C2 0xD8 35 #define SW_REV_D 0xD0 36 #define SW_REV_E 0xC8 37 #define __PHY_MASK 0xF9 38 #define __PHY_ETH2_MASK 0xFB 39 #define __PHY_ETH1_MASK 0xFD 40 41 /* MMC */ 42 #ifdef CONFIG_MMC 43 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 44 #endif 45 46 47 #define CONFIG_PCIE1 /* PCIE controller 1 */ 48 49 #define CONFIG_PCI_SCAN_SHOW 50 51 #undef CONFIG_EXTRA_ENV_SETTINGS 52 #define CONFIG_EXTRA_ENV_SETTINGS \ 53 "verify=no\0" \ 54 "initrd_high=0xffffffffffffffff\0" \ 55 "fdt_addr=0x00f00000\0" \ 56 "kernel_addr=0x01000000\0" \ 57 "kernelheader_addr=0x600000\0" \ 58 "scriptaddr=0x80000000\0" \ 59 "scripthdraddr=0x80080000\0" \ 60 "fdtheader_addr_r=0x80100000\0" \ 61 "kernelheader_addr_r=0x80200000\0" \ 62 "kernel_addr_r=0x96000000\0" \ 63 "fdt_addr_r=0x90000000\0" \ 64 "load_addr=0xa0000000\0" \ 65 "kernel_size=0x2800000\0" \ 66 "kernelheader_size=0x40000\0" \ 67 "bootm_size=0x10000000\0" \ 68 "console=ttyS0,115200\0" \ 69 BOOTENV \ 70 "boot_scripts=ls1012ardb_boot.scr\0" \ 71 "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \ 72 "scan_dev_for_boot_part=" \ 73 "part list ${devtype} ${devnum} devplist; " \ 74 "env exists devplist || setenv devplist 1; " \ 75 "for distro_bootpart in ${devplist}; do " \ 76 "if fstype ${devtype} " \ 77 "${devnum}:${distro_bootpart} " \ 78 "bootfstype; then " \ 79 "run scan_dev_for_boot; " \ 80 "fi; " \ 81 "done\0" \ 82 "scan_dev_for_boot=" \ 83 "echo Scanning ${devtype} " \ 84 "${devnum}:${distro_bootpart}...; " \ 85 "for prefix in ${boot_prefixes}; do " \ 86 "run scan_dev_for_scripts; " \ 87 "done;" \ 88 "\0" \ 89 "boot_a_script=" \ 90 "load ${devtype} ${devnum}:${distro_bootpart} " \ 91 "${scriptaddr} ${prefix}${script}; " \ 92 "env exists secureboot && load ${devtype} " \ 93 "${devnum}:${distro_bootpart} " \ 94 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \ 95 "env exists secureboot " \ 96 "&& esbc_validate ${scripthdraddr};" \ 97 "source ${scriptaddr}\0" \ 98 "installer=load mmc 0:2 $load_addr " \ 99 "/flex_installer_arm64.itb; " \ 100 "bootm $load_addr#$board\0" \ 101 "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ 102 "sf probe && sf read $load_addr " \ 103 "$kernel_addr $kernel_size; env exists secureboot " \ 104 "&& sf read $kernelheader_addr_r $kernelheader_addr " \ 105 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ 106 "bootm $load_addr#$board\0" 107 108 #undef CONFIG_BOOTCOMMAND 109 #ifdef CONFIG_TFABOOT 110 #undef QSPI_NOR_BOOTCOMMAND 111 #define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ 112 "env exists secureboot && esbc_halt;" 113 #else 114 #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ 115 "env exists secureboot && esbc_halt;" 116 #endif 117 118 #include <asm/fsl_secure_boot.h> 119 120 #endif /* __LS1012ARDB_H__ */ 121