1 /* SPDX-License-Identifier: GPL-2.0+ 2 * 3 * Copyright (C) 2020 Linumiz 4 * Author: Parthiban Nallathambi <parthiban@linumiz.com> 5 */ 6 7 #ifndef __MYS_6ULX_H 8 #define __MYS_6ULX_H 9 10 #include <linux/sizes.h> 11 #include "mx6_common.h" 12 13 /* SPL options */ 14 #include "imx6_spl.h" 15 16 #define CONFIG_SYS_FSL_USDHC_NUM 1 17 18 /* Size of malloc() pool */ 19 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 20 21 /* Console configs */ 22 #define CONFIG_MXC_UART_BASE UART1_BASE 23 24 /* MMC Configs */ 25 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 26 27 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 28 #define CONFIG_SYS_HZ 1000 29 30 /* Physical Memory Map */ 31 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 32 #define PHYS_SDRAM_SIZE SZ_256M 33 34 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 35 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 36 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 37 38 #define CONFIG_SYS_INIT_SP_OFFSET \ 39 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 40 #define CONFIG_SYS_INIT_SP_ADDR \ 41 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 42 43 /* NAND */ 44 #define CONFIG_SYS_MAX_NAND_DEVICE 1 45 #define CONFIG_SYS_NAND_BASE 0x40000000 46 47 /* USB Configs */ 48 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 49 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 50 #define CONFIG_MXC_USB_FLAGS 0 51 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 52 53 #define CONFIG_EXTRA_ENV_SETTINGS \ 54 "console=ttymxc0,115200n8\0" \ 55 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 56 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 57 "fdt_addr_r=0x82000000\0" \ 58 "fdt_high=0xffffffff\0" \ 59 "initrd_high=0xffffffff\0" \ 60 "kernel_addr_r=0x81000000\0" \ 61 "pxefile_addr_r=0x87100000\0" \ 62 "ramdisk_addr_r=0x82100000\0" \ 63 "scriptaddr=0x87000000\0" \ 64 BOOTENV 65 66 #define BOOT_TARGET_DEVICES(func) \ 67 func(MMC, mmc, 0) \ 68 func(UBIFS, ubifs, 0) \ 69 func(PXE, pxe, na) \ 70 func(DHCP, dhcp, na) 71 72 #include <config_distro_bootcmd.h> 73 74 #endif /* __MYS_6ULX_H */ 75