1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 4 * 5 * Configuration settings for the Boundary Devices Nitrogen6X 6 * and Freescale i.MX6Q Sabre Lite boards. 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "mx6_common.h" 13 14 #define CONFIG_MACH_TYPE 3769 15 16 /* Size of malloc() pool */ 17 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 18 19 #define CONFIG_USBD_HS 20 21 #define CONFIG_MXC_UART_BASE UART2_BASE 22 23 /* I2C Configs */ 24 #define CONFIG_SYS_I2C 25 #define CONFIG_SYS_I2C_MXC 26 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 27 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 28 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 29 #define CONFIG_SYS_I2C_SPEED 100000 30 #define CONFIG_I2C_EDID 31 32 /* MMC Configs */ 33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 34 #define CONFIG_SYS_FSL_USDHC_NUM 2 35 36 /* 37 * SATA Configs 38 */ 39 #ifdef CONFIG_CMD_SATA 40 #define CONFIG_SYS_SATA_MAX_DEVICE 1 41 #define CONFIG_DWC_AHSATA_PORT_ID 0 42 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 43 #define CONFIG_LBA48 44 #endif 45 46 #define CONFIG_FEC_MXC 47 #define IMX_FEC_BASE ENET_BASE_ADDR 48 #define CONFIG_FEC_XCV_TYPE RGMII 49 #define CONFIG_ETHPRIME "FEC" 50 #define CONFIG_FEC_MXC_PHYADDR 6 51 52 /* USB Configs */ 53 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 54 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 55 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 56 #define CONFIG_MXC_USB_FLAGS 0 57 58 /* Framebuffer and LCD */ 59 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) 60 #define CONFIG_IMX_HDMI 61 #define CONFIG_IMX_VIDEO_SKIP 62 63 #ifdef CONFIG_CMD_MMC 64 #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) 65 #else 66 #define DISTRO_BOOT_DEV_MMC(func) 67 #endif 68 69 #ifdef CONFIG_CMD_SATA 70 #define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0) 71 #else 72 #define DISTRO_BOOT_DEV_SATA(func) 73 #endif 74 75 #ifdef CONFIG_USB_STORAGE 76 #define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0) 77 #else 78 #define DISTRO_BOOT_DEV_USB(func) 79 #endif 80 81 #ifdef CONFIG_CMD_PXE 82 #define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na) 83 #else 84 #define DISTRO_BOOT_DEV_PXE(func) 85 #endif 86 87 #ifdef CONFIG_CMD_DHCP 88 #define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na) 89 #else 90 #define DISTRO_BOOT_DEV_DHCP(func) 91 #endif 92 93 94 #if defined(CONFIG_SABRELITE) 95 #define FDTFILE "fdtfile=imx6q-sabrelite.dtb\0" 96 #else 97 /* FIXME: nitrogen6x covers multiple configs. Define fdtfile for each supported config. */ 98 #define FDTFILE 99 #endif 100 101 #define BOOT_TARGET_DEVICES(func) \ 102 DISTRO_BOOT_DEV_MMC(func) \ 103 DISTRO_BOOT_DEV_SATA(func) \ 104 DISTRO_BOOT_DEV_USB(func) \ 105 DISTRO_BOOT_DEV_PXE(func) \ 106 DISTRO_BOOT_DEV_DHCP(func) 107 108 #include <config_distro_bootcmd.h> 109 #include <linux/stringify.h> 110 111 #define CONFIG_EXTRA_ENV_SETTINGS \ 112 "console=ttymxc1\0" \ 113 "fdt_high=0xffffffff\0" \ 114 "initrd_high=0xffffffff\0" \ 115 "fdt_addr_r=0x18000000\0" \ 116 FDTFILE \ 117 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 118 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 119 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 120 "ramdisk_addr_r=0x13000000\0" \ 121 "ramdiskaddr=0x13000000\0" \ 122 "ip_dyn=yes\0" \ 123 "usb_pgood_delay=2000\0" \ 124 BOOTENV 125 126 /* Miscellaneous configurable options */ 127 128 /* Physical Memory Map */ 129 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 130 131 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 132 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 133 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 134 135 #define CONFIG_SYS_INIT_SP_OFFSET \ 136 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 137 #define CONFIG_SYS_INIT_SP_ADDR \ 138 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 139 140 /* Environment organization */ 141 142 /* 143 * PCI express 144 */ 145 #ifdef CONFIG_CMD_PCI 146 #define CONFIG_PCI_SCAN_SHOW 147 #define CONFIG_PCIE_IMX 148 #endif 149 150 #endif /* __CONFIG_H */ 151