1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 Samsung Electronics 4 * 5 * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board. 6 */ 7 8 #ifndef __CONFIG_ORIGEN_H 9 #define __CONFIG_ORIGEN_H 10 11 #include <configs/exynos4-common.h> 12 13 /* High Level Configuration Options */ 14 #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ 15 #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ 16 17 /* ORIGEN has 4 bank of DRAM */ 18 #define CONFIG_SYS_SDRAM_BASE 0x40000000 19 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 20 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 21 22 /* memtest works on */ 23 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) 24 25 #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN 26 27 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 28 29 #define CONFIG_SYS_MONITOR_BASE 0x00000000 30 31 /* Power Down Modes */ 32 #define S5P_CHECK_SLEEP 0x00000BAD 33 #define S5P_CHECK_DIDLE 0xBAD00000 34 #define S5P_CHECK_LPA 0xABAD0000 35 36 /* MMC SPL */ 37 #define COPY_BL2_FNPTR_ADDR 0x02020030 38 39 #define CONFIG_EXTRA_ENV_SETTINGS \ 40 "loadaddr=0x40007000\0" \ 41 "rdaddr=0x48000000\0" \ 42 "kerneladdr=0x40007000\0" \ 43 "ramdiskaddr=0x48000000\0" \ 44 "console=ttySAC2,115200n8\0" \ 45 "mmcdev=0\0" \ 46 "bootenv=uEnv.txt\0" \ 47 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 48 "importbootenv=echo Importing environment from mmc ...; " \ 49 "env import -t $loadaddr $filesize\0" \ 50 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 51 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 52 "source ${loadaddr}\0" 53 #define CONFIG_BOOTCOMMAND \ 54 "if mmc rescan; then " \ 55 "echo SD/MMC found on device ${mmcdev};" \ 56 "if run loadbootenv; then " \ 57 "echo Loaded environment from ${bootenv};" \ 58 "run importbootenv;" \ 59 "fi;" \ 60 "if test -n $uenvcmd; then " \ 61 "echo Running uenvcmd ...;" \ 62 "run uenvcmd;" \ 63 "fi;" \ 64 "if run loadbootscript; then " \ 65 "run bootscript; " \ 66 "fi; " \ 67 "fi;" \ 68 "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " 69 70 #define CONFIG_CLK_1000_400_200 71 72 /* MIU (Memory Interleaving Unit) */ 73 #define CONFIG_MIU_2BIT_21_7_INTERLEAVED 74 75 #define RESERVE_BLOCK_SIZE (512) 76 #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ 77 78 #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) 79 80 #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 81 82 /* U-Boot copy size from boot Media to DRAM.*/ 83 #define COPY_BL2_SIZE 0x80000 84 #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) 85 #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) 86 87 #endif /* __CONFIG_H */ 88