1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2011-2014 Freescale Semiconductor, Inc. 4 */ 5 6 /* 7 * Corenet DS style board configuration file 8 */ 9 #ifndef __QEMU_PPCE500_H 10 #define __QEMU_PPCE500_H 11 12 #define CONFIG_SYS_MPC85XX_NO_RESETVEC 13 14 #define CONFIG_SYS_RAMBOOT 15 16 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ 17 18 #define CONFIG_ENABLE_36BIT_PHYS 19 20 /* Needed to fill the ccsrbar pointer */ 21 22 /* Virtual address to CCSRBAR */ 23 #define CONFIG_SYS_CCSRBAR 0xe0000000 24 /* Physical address should be a function call */ 25 #ifndef __ASSEMBLY__ 26 extern unsigned long long get_phys_ccsrbar_addr_early(void); 27 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32) 28 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early() 29 #else 30 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 31 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR 32 #endif 33 34 /* Virtual address range for PCI region maps */ 35 #define CONFIG_SYS_PCI_MAP_START 0x80000000 36 #define CONFIG_SYS_PCI_MAP_END 0xe0000000 37 38 /* Virtual address to a temporary map if we need it (max 128MB) */ 39 #define CONFIG_SYS_TMPVIRT 0xe8000000 40 41 /* 42 * DDR Setup 43 */ 44 #define CONFIG_VERY_BIG_RAM 45 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 46 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 47 48 #define CONFIG_CHIP_SELECTS_PER_CTRL 0 49 50 #define CONFIG_SYS_CLK_FREQ 33000000 51 52 #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ 53 54 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 55 56 #define CONFIG_HWCONFIG 57 58 #define CONFIG_SYS_INIT_RAM_ADDR 0x00100000 59 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0 60 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000 61 /* The assembler doesn't like typecast */ 62 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ 63 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ 64 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) 65 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 66 67 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 68 GENERATED_GBL_DATA_SIZE) 69 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 70 71 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 72 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 73 74 #define CONFIG_LBA48 75 76 /* RTC */ 77 #define CONFIG_RTC_PT7C4338 78 79 /* 80 * Environment 81 */ 82 83 #define CONFIG_LOADS_ECHO /* echo on for serial download */ 84 85 /* 86 * Miscellaneous configurable options 87 */ 88 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 89 90 /* 91 * For booting Linux, the board info and command line data 92 * have to be in the first 64 MB of memory, since this is 93 * the maximum mapped by the Linux kernel during initialization. 94 */ 95 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ 96 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 97 98 /* 99 * Environment Configuration 100 */ 101 #define CONFIG_ROOTPATH "/opt/nfsroot" 102 #define CONFIG_BOOTFILE "uImage" 103 #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ 104 105 /* default location for tftp and bootm */ 106 #define CONFIG_LOADADDR 1000000 107 108 #define CONFIG_BOOTCOMMAND \ 109 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdtcontroladdr\0" 110 111 #endif /* __QEMU_PPCE500_H */ 112