1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc. 4 * 5 * Configuration settings for the Freescale S32V234 EVB board. 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #include <asm/arch/imx-regs.h> 12 13 #define CONFIG_S32V234 14 15 /* Config GIC */ 16 #define CONFIG_GICV2 17 #define GICD_BASE 0x7D001000 18 #define GICC_BASE 0x7D002000 19 20 #define CONFIG_REMAKE_ELF 21 #undef CONFIG_RUN_FROM_IRAM_ONLY 22 23 #define CONFIG_RUN_FROM_DDR1 24 #undef CONFIG_RUN_FROM_DDR0 25 26 /* Run by default from DDR1 */ 27 #ifdef CONFIG_RUN_FROM_DDR0 28 #define DDR_BASE_ADDR 0x80000000 29 #else 30 #define DDR_BASE_ADDR 0xC0000000 31 #endif 32 33 #define CONFIG_MACH_TYPE 4146 34 35 #define CONFIG_SKIP_LOWLEVEL_INIT 36 37 /* Enable passing of ATAGs */ 38 #define CONFIG_CMDLINE_TAG 39 40 /* SMP Spin Table Definitions */ 41 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 42 43 /* Generic Timer Definitions */ 44 #define COUNTER_FREQUENCY (1000000000) /* 1000MHz */ 45 #define CONFIG_SYS_FSL_ERRATUM_A008585 46 47 /* Size of malloc() pool */ 48 #ifdef CONFIG_RUN_FROM_IRAM_ONLY 49 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024) 50 #else 51 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 52 #endif 53 54 #define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR 55 56 #define CONFIG_DEBUG_UART_LINFLEXUART 57 #define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE 58 59 #define CONFIG_SYS_UART_PORT (1) 60 61 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR 62 #define CONFIG_SYS_FSL_ESDHC_NUM 1 63 64 #if 0 65 66 /* Ethernet config */ 67 #define CONFIG_FEC_MXC 68 #define IMX_FEC_BASE ENET_BASE_ADDR 69 #define CONFIG_FEC_XCV_TYPE RMII 70 #define CONFIG_FEC_MXC_PHYADDR 0 71 #endif 72 73 #if 0 /* Disable until the FLASH will be implemented */ 74 #define CONFIG_SYS_USE_NAND 75 #endif 76 77 #ifdef CONFIG_SYS_USE_NAND 78 /* Nand Flash Configs */ 79 #define CONFIG_JFFS2_NAND 80 #define MTD_NAND_FSL_NFC_SWECC 1 81 #define CONFIG_NAND_FSL_NFC 82 #define CONFIG_SYS_NAND_BASE 0x400E0000 83 #define CONFIG_SYS_MAX_NAND_DEVICE 1 84 #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE 85 #define CONFIG_SYS_NAND_SELECT_DEVICE 86 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ 87 #endif 88 89 #define CONFIG_LOADADDR 0xC307FFC0 90 91 #define CONFIG_EXTRA_ENV_SETTINGS \ 92 "boot_scripts=boot.scr.uimg boot.scr\0" \ 93 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 94 "console=ttyLF0,115200\0" \ 95 "fdt_file=s32v234-evb.dtb\0" \ 96 "fdt_high=0xffffffff\0" \ 97 "initrd_high=0xffffffff\0" \ 98 "fdt_addr_r=0xC2000000\0" \ 99 "kernel_addr_r=0xC307FFC0\0" \ 100 "ramdisk_addr_r=0xC4000000\0" \ 101 "ramdisk=rootfs.uimg\0"\ 102 "ip_dyn=yes\0" \ 103 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 104 "update_sd_firmware_filename=u-boot.imx\0" \ 105 "update_sd_firmware=" \ 106 "if test ${ip_dyn} = yes; then " \ 107 "setenv get_cmd dhcp; " \ 108 "else " \ 109 "setenv get_cmd tftp; " \ 110 "fi; " \ 111 "if mmc dev ${mmcdev}; then " \ 112 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 113 "setexpr fw_sz ${filesize} / 0x200; " \ 114 "setexpr fw_sz ${fw_sz} + 1; " \ 115 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 116 "fi; " \ 117 "fi\0" \ 118 "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \ 119 "jtagboot=echo Booting using jtag...; " \ 120 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ 121 "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \ 122 "run loaduimage; run loadramdisk; run loadfdt;"\ 123 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ 124 "boot_net_usb_start=true\0" \ 125 BOOTENV 126 127 #define BOOT_TARGET_DEVICES(func) \ 128 func(MMC, mmc, 1) \ 129 func(MMC, mmc, 0) \ 130 func(DHCP, dhcp, na) 131 132 #define CONFIG_BOOTCOMMAND \ 133 "run distro_bootcmd" 134 135 #include <config_distro_bootcmd.h> 136 #include <linux/stringify.h> 137 138 /* Miscellaneous configurable options */ 139 #define CONFIG_SYS_PROMPT "=> " 140 141 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 142 #define CONFIG_SYS_HZ 1000 143 144 #ifdef CONFIG_RUN_FROM_IRAM_ONLY 145 #define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR) 146 #endif 147 148 /* Physical memory map */ 149 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */ 150 #define PHYS_SDRAM (DDR_BASE_ADDR) 151 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) 152 153 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 154 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 155 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 156 157 #define CONFIG_SYS_INIT_SP_OFFSET \ 158 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 159 #define CONFIG_SYS_INIT_SP_ADDR \ 160 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 161 162 /* environment organization */ 163 164 165 #define CONFIG_BOOTP_BOOTFILESIZE 166 167 #endif 168